📄 iop.c
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**************************************************************************/
void reset_iop(void)
{
int i;
//int len;
//UINT32 *p, *q;
#ifdef PORTABLE_DVD//nono add 2005-2-18 16:44
#ifdef MP_BOARD_216_PIN_NON_SHARE//TEAC
//use ioprom_spi_teac_8202_216.inc
GPIO_M_SET(9, 0);//TEAC 8202 216 pin
GPIO_M_SET(10, 0);//TEAC 8202 216 pin
GPIO_M_SET(16, 0);//TEAC 8202 216 pin
#else
//use ioprom_spi_teac_8202.inc
GPIO_M_SET(21, 0);//TEAC 8202 256 pin
GPIO_M_SET(22, 0);//TEAC 8202 256 pin
GPIO_M_SET(23, 0);//TEAC 8202 256 pin
#endif
#endif//#ifdef PORTABLE_DVD
// reset iop
IOP_RESET();
#ifdef PMP_MCU810
// gpio 21, 22, 23 for VFD
GPIO_M_SET(21, 0);
GPIO_M_SET(22, 0);
GPIO_M_SET(23, 0);
#endif
// setup IOP interface / GPIO
#ifdef OLD_I2C_DEFINE
// select GPIO 35,36 for I2C
regs0->gpio_master[35 / 16] &= ~(0x3 << (35 % 16));
#else
#ifdef SPHE8202
#if defined(MP_BOARD_256_PIN_NON_SHARE)||defined(MP_BOARD_256_PIN_SHARE)//NONO 4-3-23 22:19
#if defined(SDRAM_BUS_32BITS)||defined(SDRAM_128Mx1) //mimitsai add 2004-12-07
// gpio 48(pin173), 49(pin174) for I2C
regs0->sft_cfg0 &= ~(0x1 << 7);//GPIO48
regs0->sft_cfg1 &= ~(0x1 << 5);//GPIO49
GPIO_M_SET(48, 0);
GPIO_M_SET(49, 0);
#elif defined(PMP_I2C_NEW) //////////////YANGLI ADD FOR PMP 2002\12\29
regs0->sft_cfg4 &= ~(0x1 << 5);//I2C DATA PIN62
GPIO_M_SET(5, 0);//I2C DATA PIN62
GPIO_M_SET(6, 0);//I2C CLK PIN63
#else
//gpio 95(pin228), 96(pin229) for I2C
GPIO_M_SET(95, 0);
GPIO_M_SET(96, 0);
#endif
#elif defined(MP_BOARD_216_PIN_NON_SHARE) //kenny 2004/7/14
// gpio 17(pin67), 18(pin68) for I2C
regs0->sft_cfg1 &= ~(0x1 << 2);//GPIO17
regs0->sft_cfg1 &= ~(0x1 << 1);//GPIO18
GPIO_M_SET(17, 0);
GPIO_M_SET(18, 0);
#else//MP_BOARD_256_PIN_NON_SHARE
// gpio 17, 18 for I2C
GPIO_M_SET(17, 0);
GPIO_M_SET(18, 0);
#endif//MP_BOARD_256_PIN_NON_SHARE
#elif defined(SPHE1000)
// select GPIO44,45 for I2C
GPIO_M_SET(44,0);
GPIO_M_SET(45,0);
#else
// select GPIO 0,1 for I2C
regs0->gpio_master[0 / 16] &= ~(0x3 << (0 % 16));
#endif
#endif
#ifdef SUPPORT_SPI
regs0->gpio_master[SPI_DATAIN / 16] &= ~(0x1 << (SPI_DATAIN % 16)); //SPI IN
regs0->gpio_master[SPI_CLK / 16] &= ~(0x1 << (SPI_CLK % 16)); // SPI CLK
regs0->gpio_master[SPI_DATAOUT / 16] &= ~(0x1 << (SPI_DATAOUT % 16)); // SPI OUT
//regs0->gpio_master[49 / 16] |= (0x1 << (49 % 16)); //50 SPI IN
//regs0->gpio_master[51 / 16] |= (0x1 << (51 % 16)); //51 SPI CLK
//regs0->gpio_master[52 / 16] |= (0x1 << (52 % 16)); //52 SPI OUT
//while(1)
//{
// GPIO_E_SET(49, 1);
// GPIO_O_SET(49, 0);
//GPIO_O_SET(49, 1);
// GPIO_E_SET(49, 0);
// delay_1ms(100);
//}
//GPIO_E_SET(51, 1);
//GPIO_O_SET(51, 1);
//GPIO_E_SET(52, 1);
//GPIO_O_SET(52, 1);
#endif
// set GPIO97(GAME_D1) for PS/2 mouse DATA and GPIO98(GAME_D0) for PS/2 mouse CLK
#if defined(SUPPORT_PS2) && !defined(SUPPORT_GAMEPAD_MOUSE)
GPIO_M_SET(97, 0);
GPIO_M_SET(98, 0);
#endif
// select GPIO 40,41,42,43 for game pad
#if defined(SUPPORT_NESGAME)||defined(SUPPORT_SPG_GAME) || defined(SUPPORT_GAMEPAD_MOUSE)
#ifndef SUPPORT_IR_GAME
#ifdef SPHE8202
#if defined(MP_BOARD_256_PIN_NON_SHARE)
#if defined(SDRAM_BUS_32BITS)||defined(SDRAM_128Mx1) //mimitsai add 2004-12-07
regs0->gpio_master[98 / 16] &= ~(0x1 << (98 % 16)); //D0 gpio 98 PIN 231
regs0->gpio_master[97 / 16] &= ~(0x1 << (97 % 16)); //D1 gpio 97 PIN 230
regs0->gpio_master[99 / 16] &= ~(0x1 << (99 % 16)); //CLK gpio 99 PIN 232
regs0->gpio_master[96 / 16] &= ~(0x1 << (96 % 16)); //LATCH gpio 96 PIN 229
#else
regs0->gpio_master[98 / 16] &= ~(0x1 << (98 % 16)); //D0 gpio 98 PIN 231
regs0->gpio_master[97 / 16] &= ~(0x1 << (97 % 16)); //D1 gpio 97 PIN 230
regs0->gpio_master[99 / 16] &= ~(0x1 << (99 % 16)); //CLK gpio 99 PIN 232
regs0->gpio_master[100 / 16] &= ~(0x1 << (100 % 16)); //LATCH gpio 100 PIN 233
#endif
#elif defined(MP_BOARD_216_PIN_NON_SHARE) //rbhung for 8202S/D 216pin 2005-01-13
#ifdef IC_8202E_216_PIN_NON_SHARE_CD_DVD_MP_BOARD
regs0->gpio_master[15 / 16] &= ~(0x1 << (15 % 16)); //D0 gpio 15 PIN 65
regs0->gpio_master[16 / 16] &= ~(0x1 << (16 % 16)); //D1 gpio 16 PIN 66
regs0->gpio_master[11 / 16] &= ~(0x1 << (11 % 16)); //CLK gpio 11 PIN 59
regs0->gpio_master[10 / 16] &= ~(0x1 << (10 % 16)); //LATCH gpio 10 PIN 58
#else
regs0->gpio_master[13 / 16] &= ~(0x1 << (13 % 16)); //D0 gpio 13 PIN 62
regs0->gpio_master[14 / 16] &= ~(0x1 << (14 % 16)); //D1 gpio 14 PIN 63
regs0->gpio_master[11 / 16] &= ~(0x1 << (11 % 16)); //CLK gpio 11 PIN 59
regs0->gpio_master[12 / 16] &= ~(0x1 << (12 % 16)); //LATCH gpio 12 PIN 61
#endif
#else
regs0->gpio_master[87 / 16] &= ~(0x1 << (87 % 16)); //D0 gpio 87 PIN 181
regs0->gpio_master[86 / 16] &= ~(0x1 << (86 % 16)); //D1 gpio 86 PIN 180
regs0->gpio_master[88 / 16] &= ~(0x1 << (88 % 16)); //CLK gpio 88 PIN 183
regs0->gpio_master[89 / 16] &= ~(0x1 << (89 % 16)); //LATCH gpio 89 PIN 184
#endif
#else
#ifdef GBM_PORTABLE_DVD
regs0->gpio_master[45 / 16] &= ~(0x1 << (45 % 16)); //D0 gpio 45 PIN 140
regs0->gpio_master[17 / 16] &= ~(0x1 << (17 % 16)); //D1 gpio 17 PIN 141
regs0->gpio_master[54 / 16] &= ~(0x1 << (54 % 16)); // CLK gpio 54 PIN 154
regs0->gpio_master[55 / 16] &= ~(0x1 << (55 % 16)); // LATCH gpio 55 PIN 155
#else
#ifndef SDRAM_16Mb_Mode
regs0->sft_cfg1 &= ~(0x1 << 3); // CS4 as GPIO3
regs0->gpio_master[2 / 16] &= ~(0x1 << (2 % 16)); //D0 gpio 2 PIN 28
regs0->gpio_master[3 / 16] &= ~(0x1 << (3 % 16)); //D1 gpio 3 PIN 29
regs0->gpio_master[4 / 16] &= ~(0x1 << (4 % 16)); // clk gpio 4 PIN 31
regs0->gpio_master[35 / 16] &= ~(0x1 << (35 % 16)); // latch gpio 35PIN 70
#else
// select GPIO 40,41,42,43 for game pad
regs0->sft_cfg0 &= ~(0xff << 7);
regs0->gpio_master[40 / 16] &= ~(0xf << (40 % 16));
#endif
#endif
#endif //SPHE8202
#endif //SUPPORT_IR_GAME
#endif //SUPPORT_NESGAME
#ifdef SPHE8202
// gpio 20 as IR
GPIO_M_SET(20, 0);
#elif defined(SPHE1000)
// gpio 26 as IR
GPIO_M_SET(26, 0);
#else
// GPIO 53 as IR, GPIO 54,55,56 as VFD
regs0->gpio_master[53 / 16] &= ~(0x1 << (53 % 16));
#endif
#ifdef SUPPORT_VFD
#ifdef SPHE8202
// gpio 21, 22, 23 for VFD
GPIO_M_SET(21, 0);
GPIO_M_SET(22, 0);
GPIO_M_SET(23, 0);
#elif defined(SPHE1000)
// GPIO 26 as IR, GPIO 27,28,29 as VFD
GPIO_M_SET(27, 0);
GPIO_M_SET(28, 0);
GPIO_M_SET(29, 0);
#else
// GPIO 53 as IR, GPIO 54,55,56 as VFD
regs0->gpio_master[54 / 16] &= ~(0x7 << (54 % 16));
#endif
#endif
#ifdef TTE_HOST_DVD //for TTE PCA964 LIJD 2004-11-11 20:02
regs0->sft_cfg0 &= ~(0x1 << 7);//GPIO48
regs0->sft_cfg1 &= ~(0x1 << 5);//GPIO49
GPIO_M_SET(32, 0);
GPIO_M_SET(33, 0);
GPIO_M_SET(35, 0);
GPIO_M_SET(36, 0);
GPIO_M_SET(37, 0);
GPIO_M_SET(40, 0);
GPIO_M_SET(41, 0);
GPIO_M_SET(42, 0);
GPIO_M_SET(43, 0);
GPIO_M_SET(44, 0);
GPIO_M_SET(45, 0);
GPIO_M_SET(46, 0);
GPIO_M_SET(47, 0);
GPIO_M_SET(48, 0);
GPIO_M_SET(49, 0);
#endif
// reset IOP/RISC interface
for (i = 0; i < 7; i++) regs0->iop_data[i] = 0;
// below registers' value are used only for first time gotten by IOP
// regs0->iop_data[1]: in standby mode or not (1:Y, 0:N)
// regs0->iop_data[2]: store IR power key value
// regs0->iop_data[3]: store VFD power key value
// regs0->iop_data[4]: IR power key exist or not
// regs0->iop_data[5]: VFD power key exist or not
//
if (bSleepFlag)
{
BYTE nIndex, bVFD_MASK, nIndex2 = 0;
regs0->iop_data[1] = 1;
#if defined(DP2030_SCAN_KEY)//eastech2030
GPIO_M_SET(23,0);
GPIO_M_SET(100,0);
#elif defined(DP30H0_KEY_SCAN)//eastech2030
regs0->sft_cfg1 &= ~(0x1 << 5);
GPIO_M_SET(94,0);
GPIO_M_SET(97,0);
#endif
#ifdef USE_VFDPORT_TO_KEYLIGHT_GBM
regs0->gpio_master[54 / 16] &= ~(0x7 << (54 % 16));//NONO 2003-8-3 15:34
#endif//USE_VFDPORT_TO_KEYLIGHT_GBM
#ifdef VTREK_MINI_DVD //linrc add for vtreck mini dvd 2004-3-27 16:50
regs0->gpio_master[54 / 16] &= ~(0x7 << (54 % 16));//linrc 2003-8-3 15:34
GPIO_M_SET(55,0);
#endif //endif VTREK_MINI_DVD
#ifdef USE_PIN31_CONTROL_POWER_LED
regs0->gpio_master[4 / 16] &= ~(0x1 << (4 % 16));//gerry,2004/2/11 05:32⌨️ 快捷键说明
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