ddx8000.c

Sunplus 8202S source code.

#endif
}
#endif

//volume control:  include master volume control and channel volume control
//input:
/*
updown:  1---boost,  -1---cut
mute:    1---Hard Master Mute,  0---not mute,adjust volume
*/
void ddx_master_volume_adjust(int updown,BYTE mute)
{
    BYTE tmp_var;
    int iRts;
    
    if(mute)
    {
		tmp_var = 0xff;
		vol_gain[0] = tmp_var;
		WriteToI2c(DDX8K_ADDR,MASTER_VOL_REG,&tmp_var,1);
		return;
    }
    else
    {
//    	ddx_masterMute(1);
		iRts = ReadFromI2c(DDX8K_ADDR,MASTER_VOL_REG,&tmp_var,1);
    	if(updown==1)
    	{
    		if(tmp_var>0x00 && tmp_var<=0x13)//0x00:0dB,0x13:-9.5dB
    			tmp_var--;
    		else if(tmp_var>=0x14 && tmp_var<=0x31)//0x14:-10dB,0x31:-24.5dB
    		    tmp_var = tmp_var - 2;
    		else if(tmp_var>=0x32 && tmp_var<=0x6b)//0x32:-25dB,0x6b:-53dB
    			tmp_var = tmp_var - 4;
    	}
    	else if(updown==-1)
    	{
    		if(tmp_var>=0x00 && tmp_var<=0x13)//0x00:0dB,0x13:-9.5dB
    			tmp_var++;
    		else if(tmp_var>=0x14 && tmp_var<=0x31)//0x14:-10dB,0x31:-24.5dB
    		    tmp_var += 2;
    		else if(tmp_var>=0x32 && tmp_var<=0x6b)//0x32:-25dB,0x6b:-53dB
    			tmp_var += 4;
    	}
    	if(amp_lev[0]==1)
    		tmp_var = 0x6b;//-53dB
    	else if(amp_lev[0]==0)
    		tmp_var = 0xff;
		vol_gain[0] = tmp_var;
    	WriteToI2c(DDX8K_ADDR,MASTER_VOL_REG,&tmp_var,1);
#ifdef SUPPORT_SAVE_AMPLIFIER_STATUS
		iRts = WriteToI2c(0xa0,AMPLIFIER_START,&amp_lev[0],1);    	
		iRts = WriteToI2c(0xa0,AMPLIFIER_START+9,&tmp_var,1);
#endif
//    	ddx_masterMute(0);
    }
}

//Set Master Volume Gain
void ddx_setMVG(BYTE chAddr,BYTE ctrl)
{
	WriteToI2c(DDX8K_ADDR,chAddr,&ctrl,1);
}
//input:
/*
chAddr:  channel volume regsiter address
updown:  1---boost,  -1---cut
*/
#ifdef AMPVOL_ADJUST_TYPE1//xyy 2004-5-25
void ddx_channel_volume_adjust(BYTE chAddr,int updown)
{
//    UINT16      romSum=0;
    BYTE tmp_var;

//	ddx_masterMute(1);
	ReadFromI2c(DDX8K_ADDR,chAddr,&tmp_var,1);
	if(updown==1)
	{
		if(tmp_var>0x00)
		    tmp_var -= 2;
	}
	else if(updown==-1)
	{
		if(tmp_var<0x28)
		    tmp_var += 2;
	}
	vol_gain[channelNm] = tmp_var;
	WriteToI2c(DDX8K_ADDR,chAddr,&tmp_var,1);
#ifdef SUPPORT_SAVE_AMPLIFIER_STATUS //xyy 2004-3-6 10:16
	WriteToI2c(0xa0,AMPLIFIER_START+channelNm,&amp_lev[channelNm],1);    	
	WriteToI2c(0xa0,AMPLIFIER_START+(9+channelNm),&tmp_var,1);
#endif
//	ddx_masterMute(0);
}

#else
void ddx_channel_volume_adjust(BYTE chAddr,int updown)
{
//    UINT16      romSum=0;
    BYTE tmp_var;
	
//	ddx_masterMute(1);
	ReadFromI2c(DDX8K_ADDR,chAddr,&tmp_var,1);
	if(updown==1)
	{
    		if(tmp_var>0x00 && tmp_var<=0x13)//0x00:24dB,0x13:14.5dB
    			tmp_var--;
    		else if(tmp_var>=0x14 && tmp_var<=0x31)//0x14:14dB,0x31:-0.5dB
    		    tmp_var -= 2;
    		else if(tmp_var>=0x32 && tmp_var<=0x6e)//0x32:-1dB,0x6b:-30.5dB
    			tmp_var -= 4;
	}
	else if(updown==-1)
	{
    		if(tmp_var>=0x00 && tmp_var<=0x13)//0x00:24dB,0x13:14.5dB
    			tmp_var++;
    		else if(tmp_var>=0x14 && tmp_var<=0x31)//0x14:14dB,0x31:-0.5dB
    		    tmp_var += 2;
    		else if(tmp_var>=0x32 && tmp_var<=0x6e)//0x32:-1dB,0x6b:-30.5dB
    			tmp_var += 4;
	}
	vol_gain[y_index] = tmp_var;
	WriteToI2c(DDX8K_ADDR,chAddr,&tmp_var,1);
#ifdef SUPPORT_SAVE_AMPLIFIER_STATUS //xyy 2004-3-6 10:16
	WriteToI2c(0xa0,AMPLIFIER_START+y_index,&amp_lev[y_index],1);    	
	WriteToI2c(0xa0,AMPLIFIER_START+(9+y_index),&tmp_var,1);
#endif
//	ddx_masterMute(0);
}
#endif


//Set Channel Volume Gain
void ddx_setCVG(BYTE chAddr,BYTE ctrl)
{
	WriteToI2c(DDX8K_ADDR,chAddr,&ctrl,1);
}

//all changes in volume take place at digital zero-crossing
//will create the smoothest possible volume transition
void ddx_enZeroCross(void)
{
	write_reg_bit(CONFIGREG_B,6,1);
}
void ddx_disZeroCross(void)
{//volume updates immediately
	write_reg_bit(CONFIGREG_B,6,0);
}

//Master Volume Mute
//mute all channels simultaneously
//mute   1: mute       0: demute
void ddx_masterMute(BYTE mute)
{
	if(mute)
		write_reg_bit(MASTER_MUTE_REG,0,1);
	else
		write_reg_bit(MASTER_MUTE_REG,0,0);
}

//channel mute individually
//mute   1: mute       0: demute
void ddx_channelMute(BYTE chNum,BYTE mute)
{
	if(mute)
		write_reg_bit(CHANEL_MUTE_REG,chNum,1);
	else
		write_reg_bit(CHANEL_MUTE_REG,chNum,0);
}

//Channel Limiter Selection
/*
CxLS(1,0)   Channel Limiter Mapping
-------------------------------------------
   00       Channel has limiting disabled
   01       Channel is mapped to limiter #1
   10       Channel is mapped to limiter #2
   11       Reserved.Don't use this setting
--------------------------------------------
*/
void ddx_ch1_limiterSel(BYTE selCtrl)
{
	BYTE data;
	ReadFromI2c(DDX8K_ADDR,CLIMITER_SEL0,&data,1);
	data = selCtrl | (data & 0xfc); 
	if(selCtrl<0x03)
		WriteToI2c(DDX8K_ADDR,CLIMITER_SEL0,&data,1);
}

void ddx_ch2_limiterSel(BYTE selCtrl)
{
	BYTE data;
	ReadFromI2c(DDX8K_ADDR,CLIMITER_SEL0,&data,1);
	data = (selCtrl << 2) | (data & 0xf3); 
	if(selCtrl<0x03)
		WriteToI2c(DDX8K_ADDR,CLIMITER_SEL0,&data,1);
}

void ddx_ch3_limiterSel(BYTE selCtrl)
{
	BYTE data;
	ReadFromI2c(DDX8K_ADDR,CLIMITER_SEL0,&data,1);
	data = (selCtrl << 4) | (data & 0xcf); 
	if(selCtrl<0x03)
		WriteToI2c(DDX8K_ADDR,CLIMITER_SEL0,&data,1);
}
void ddx_ch4_limiterSel(BYTE selCtrl)
{
	BYTE data;
	ReadFromI2c(DDX8K_ADDR,CLIMITER_SEL0,&data,1);
	data = (selCtrl << 6) | (data & 0x3f); 
	if(selCtrl<0x03)
		WriteToI2c(DDX8K_ADDR,CLIMITER_SEL0,&data,1);
}
void ddx_ch5_limiterSel(BYTE selCtrl)
{
	BYTE data;
	ReadFromI2c(DDX8K_ADDR,CLIMITER_SEL1,&data,1);
	data = selCtrl | (data & 0xfc); 
	if(selCtrl<0x03)
		WriteToI2c(DDX8K_ADDR,CLIMITER_SEL1,&data,1);
}

void ddx_ch6_limiterSel(BYTE selCtrl)
{
	BYTE data;
	ReadFromI2c(DDX8K_ADDR,CLIMITER_SEL1,&data,1);
	data = (selCtrl << 2) | (data & 0xf3); 
	if(selCtrl<0x03)
		WriteToI2c(DDX8K_ADDR,CLIMITER_SEL1,&data,1);
}

void ddx_ch7_limiterSel(BYTE selCtrl)
{
	BYTE data;
	ReadFromI2c(DDX8K_ADDR,CLIMITER_SEL1,&data,1);
	data = (selCtrl << 4) | (data & 0xcf); 
	if(selCtrl<0x03)
		WriteToI2c(DDX8K_ADDR,CLIMITER_SEL1,&data,1);
}
void ddx_ch8_limiterSel(BYTE selCtrl)
{
	BYTE data;
	ReadFromI2c(DDX8K_ADDR,CLIMITER_SEL1,&data,1);
	data = (selCtrl << 6) | (data & 0x3f); 
	if(selCtrl<0x03)
		WriteToI2c(DDX8K_ADDR,CLIMITER_SEL1,&data,1);
}

//Set Compression and Release Rates of Limiter
void ddx_setL1CRrates(BYTE ctrl)
{
	WriteToI2c(DDX8K_ADDR,L1RATE_REG,&ctrl,1);
}

void ddx_setL2CRrates(BYTE ctrl)
{
	WriteToI2c(DDX8K_ADDR,L2RATE_REG,&ctrl,1);
}

//Set Compression and Release Threshold of Limiter
void ddx_setL1CRthreshold(BYTE ctrl)
{
	WriteToI2c(DDX8K_ADDR,L1THRESHOLDS_REG,&ctrl,1);
}

void ddx_setL2CRthreshold(BYTE ctrl)
{
	WriteToI2c(DDX8K_ADDR,L2THRESHOLDS_REG,&ctrl,1);
}

//Set Dynamic Range Compression mode
//drc: 1----Dynamic Range Compression mode
//     0----Anti-Clipping Mode(default)
void ddx_setDRCmode(BYTE drc)
{
	write_reg_bit(CONFIGREG_B,7,drc);
}

//Set Max Power Correction
void ddx_setMPC(void)
{
	write_reg_bit(CONFIGREG_A,7,1);
}
//Head Phone Enable or Disable
void ddx_enHeadPhone(void)
{
	write_reg_bit(CONFIGREG_A,6,1);
}
void ddx_disHeadPhone(void)
{
	write_reg_bit(CONFIGREG_A,6,0);
}

//AM Mode Enable or Disable
void ddx_enableAM_mode(void)
{
	write_reg_bit(CONFIGREG_F,3,1);
}
void ddx_disableAM_mode(void)
{
	write_reg_bit(CONFIGREG_F,3,0);
}

//Initialize volume gain
#if defined(DDX8000_BINARY_MODE) || defined(XINGQIU_BINARY_MODE)
void ddx_set_BassManagement(void)
{
	coef_factor bass_coef;
	//set channel 7,5,4,2,1 pre-scale factor
	//set channel 2,4,7,5,1 pre-scale factor
    ddx_writeCoefVal(0xd6,FL_SCALE_FACTOR); 
    ddx_writeCoefVal(0xd4,FR_SCALE_FACTOR);
    ddx_writeCoefVal(0xd3,SL_SCALE_FACTOR);
    ddx_writeCoefVal(0xd1,SR_SCALE_FACTOR);
    ddx_writeCoefVal(0xd0,CE_SCALE_FACTOR);
    ddx_writeCoefVal(0xd5,LFE_SCALE_FACTOR);
    
	//set channel 7,5,4,2,1 filter coefficient
	bass_coef.b2 = HPF_COEF_B2;
	bass_coef.b0 = HPF_COEF_B0;
	bass_coef.a2 = HPF_COEF_A2;
	bass_coef.a1 = HPF_COEF_A1;
	bass_coef.b1 = HPF_COEF_B1;
	ddx_writeCoefValSets(0x96,bass_coef);  //channel 7    
	ddx_writeCoefValSets(0x64,bass_coef);  //channel 5
	ddx_writeCoefValSets(0x4b,bass_coef);  //channel 4
	ddx_writeCoefValSets(0x19,bass_coef);  //channel 2
	ddx_writeCoefValSets(0x00,bass_coef);  //channel 1
	
	//set channel 6 filter coefficient
	bass_coef.b2 = LPF_COEF_B2;
	bass_coef.b0 = LPF_COEF_B0;
	bass_coef.a2 = LPF_COEF_A2;
	bass_coef.a1 = LPF_COEF_A1;
	bass_coef.b1 = LPF_COEF_B1;
	ddx_writeCoefValSets(0x7d,bass_coef);
}

void ddx_init_volumeGain(void)
{
#if defined(DDX8000_BINARY_MODE)
	ddx_setMVG(MASTER_VOL_REG,vol_gain[0]);
	ddx_setCVG(C7V_REG,vol_gain[1]);
	ddx_setCVG(C5V_REG,vol_gain[2]);
	ddx_setCVG(C4V_REG,vol_gain[3]);
	ddx_setCVG(C2V_REG,vol_gain[4]);
	ddx_setCVG(C1V_REG,vol_gain[5]);
	ddx_setCVG(C6V_REG,vol_gain[6]);
	ddx_setCVG(C3V_REG,0xff);
	ddx_setCVG(C8V_REG,0xff);
#elif defined(XINGQIU_BINARY_MODE)
	ddx_setMVG(MASTER_VOL_REG,vol_gain[0]);
	ddx_setCVG(C2V_REG,vol_gain[1]);
	ddx_setCVG(C4V_REG,vol_gain[2]);
	ddx_setCVG(C7V_REG,vol_gain[3]);
	ddx_setCVG(C5V_REG,vol_gain[4]);
	ddx_setCVG(C1V_REG,vol_gain[5]);
	ddx_setCVG(C6V_REG,vol_gain[6]);
	ddx_setCVG(C3V_REG,0xff);
	ddx_setCVG(C8V_REG,0xff);
#endif
}
#else
void ddx_set_BassManagement(void)
{
	coef_factor bass_coef;
	//set pre-scale factor
    ddx_writeCoefVal(0xd0,FL_SCALE_FACTOR);

    ddx_writeCoefVal(0xd1,FR_SCALE_FACTOR);

    ddx_writeCoefVal(0xd2,SL_SCALE_FACTOR);

    ddx_writeCoefVal(0xd3,SL_SCALE_FACTOR);

    ddx_writeCoefVal(0xd4,CE_SCALE_FACTOR);

    ddx_writeCoefVal(0xd5,LFE_SCALE_FACTOR);
    
	//set channel 1,2,3,4,5 filter coefficient
	bass_coef.b2 = HPF_COEF_B2;
	bass_coef.b0 = HPF_COEF_B0;
	bass_coef.a2 = HPF_COEF_A2;
	bass_coef.a1 = HPF_COEF_A1;
	bass_coef.b1 = HPF_COEF_B1;
	ddx_writeCoefValSets(0x00,bass_coef);
	ddx_writeCoefValSets(0x19,bass_coef);
	ddx_writeCoefValSets(0x32,bass_coef);
	ddx_writeCoefValSets(0x4b,bass_coef);
	ddx_writeCoefValSets(0x64,bass_coef);
	
	//set channel 6 filter coefficient
	bass_coef.b2 = LPF_COEF_B2;
	bass_coef.b0 = LPF_COEF_B0;
	bass_coef.a2 = LPF_COEF_A2;
	bass_coef.a1 = LPF_COEF_A1;
	bass_coef.b1 = LPF_COEF_B1;
	ddx_writeCoefValSets(0x7d,bass_coef);
}

void ddx_init_volumeGain(void)
{
	//set volume gain 
//	ddx_setMVG(MASTER_VOL_REG,0x2c/*-20dB*/);
//	ddx_setMVG(MASTER_VOL_REG,0x3c/*-30dB*/);
	ddx_setMVG(MASTER_VOL_REG,vol_gain[0]);
	ddx_setCVG(C1V_REG,vol_gain[1]);
	ddx_setCVG(C2V_REG,vol_gain[2]);
	ddx_setCVG(C3V_REG,vol_gain[3]);
	ddx_setCVG(C4V_REG,vol_gain[4]);
	ddx_setCVG(C5V_REG,vol_gain[5]);
	ddx_setCVG(C6V_REG,vol_gain[6]);
	ddx_setCVG(C7V_REG,0xff);
	ddx_setCVG(C8V_REG,0xff);

}
#endif

void ddx_set_biquad_iir_filter_coef(BYTE addr,BYTE top,BYTE mid,BYTE bot)
{
	#if 1
	BYTE data;
	
	NOP;
	data = addr;
	WriteToI2c(DDX8K_ADDR,0x1c,&data,1);
	data = top;
	WriteToI2c(DDX8K_ADDR,0x1d,&data,1);
	data = mid;
	WriteToI2c(DDX8K_ADDR,0x1e,&data,1);
	data = bot;
	WriteToI2c(DDX8K_ADDR,0x1f,&data,1);
	data = 0x01;
	WriteToI2c(DDX8K_ADDR,0x2c,&data,1);
	#endif

}

void ddx_set_biquad_iir_filter()
{
	int index = 0;
	do{
	ddx_set_biquad_iir_filter_coef(index,0x7f,0x8e,0x71);
	ddx_set_biquad_iir_filter_coef((index+1),0x3f,0xc7,0x38);
	ddx_set_biquad_iir_filter_coef((index+2),0x80,0xe2,0xb9);
	ddx_set_biquad_iir_filter_coef((index+3),0x7f,0x8e,0x3e);
	ddx_set_biquad_iir_filter_coef((index+4),0x80,0x71,0x8f);
	index += 5;