gpio.h

Sunplus 8202S source code.

#define SFTCFG5_B9_RISC_INT52_256   (4<<9)  // only available at 256 pin package

// sft_cfg5[14:12]
#define SFTCFG5_EC_RISC_INTEXT_DIS  (0<<12) // (default)
#define SFTCFG5_EC_RISC_INTEXT_CFG1 (1<<12) // INTRQ_N[0] from pin 141, INTRQ_N[1] from pin 143, INTRQ_N[2] from pin 144, INTRQ_N[3] from pin 145, INTRQ_N[4] from pin 146, INTRQ_N[5] from pin 148
#define SFTCFG5_EC_RISC_INTEXT_CFG2 (2<<12) // INTRQ_N[0] from pin 129, INTRQ_N[1] from pin 130, INTRQ_N[2] from pin 131, INTRQ_N[3] from pin 133, INTRQ_N[4] from pin 134, INTRQ_N[5] from pin 135
#define SFTCFG5_EC_RISC_INTEXT_CFG3 (3<<12) // INTRQ_N[0] from pin 29, INTRQ_N[1] from pin 31, INTRQ_N[2] from pin 34, INTRQ_N[3] from pin 35, INTRQ_N[4] from pin 37, INTRQ_N[5] from pin 38
#define SFTCFG5_EC_RISC_INTEXT_256  (4<<12) // only available at 256 pin package

// sft_cfg5[15]
#define SFTCFG5_F_BRIT_DIS          (0<<15) // (default)
#define SFTCFG5_F_BRIT_256          (1<<15) // only available at 256 pin package

// sft_cfg6[0]
#define SFTCFG6_0_SCLK_NOT_INVERT   (0<<0)  // MPEG_CLK not invert
#define SFTCFG6_0_SCLK_INVERT       (1<<0)  // (default), invert

// sft_cfg6[1]
#define SFTCFG6_1_SMEM_DIS          (0<<1)
#define SFTCFG6_1_SMEM_EN           (1<<1)  // (default), SERVO/MPEG SDRAM interface enable

// sft_cfg6[2]
#define SFTCFG6_2_SREG_DIS          (0<<2)
#define SFTCFG6_2_SREG_EN           (1<<2)  // (default), SERVO/MPEG register interface enable

// sft_cfg6[3]
#define SFTCFG6_3_SMODE_DIS         (0<<3)  // (default)
#define SFTCFG6_3_SMODE_EN          (1<<3)  // bit2-0 is used to config SERVO/MPEG interface

// sft_cfg6[4]
#define SFTCFG6_4_SA11_DIS          (0<<4)  // pin 109 used as GPIO 14
#define SFTCFG6_4_SA11_EN           (1<<4)  // (default)

// sft_cfg6[5]
#define SFTCFG6_5_SA12_DIS          (0<<5)  // pin 151 used as GPIO 18
#define SFTCFG6_5_SA12_EN           (1<<5)  // (default)

// sft_cfg6[6]
#define SFTCFG6_6_SBA1_DIS          (0<<6)  // pin 121 used as GPIO 15
#define SFTCFG6_6_SBA1_EN           (1<<6)  // (default)

// sft_cfg6[7]
#define SFTCFG6_7_SDQM2_DIS         (0<<7)  // pin 140 used as GPIO 17
#define SFTCFG6_7_SDQM2_EN          (1<<7)  // (default)

// sft_cfg6[8]
#define SFTCFG6_8_SDQM3_DIS         (0<<8)  // pin 139 used as GPIO 16
#define SFTCFG6_8_SDQM3_EN          (1<<8)  // (default)

// sft_cfg6[9]
#define SFTCFG6_9_SPD_DIS           (0<<9)  // (default)
#define SFTCFG6_9_SPD_EN            (1<<9)  // share mode: pin 34,35,37; non-share mode: pin 56,57,58

// sft_cfg6[10]
#define SFTCFG6_A_PLLA1_DIS         (0<<10) // 135 MHz PLLA disable
#define SFTCFG6_A_PLLA1_EN          (1<<10) // (default)

// sft_cfg6[11]
#define SFTCFG6_B_PLLA2_DIS         (0<<11) // 147 MHz PLLA disable
#define SFTCFG6_B_PLLA2_EN          (1<<11) // (default)

// sft_cfg6[12]
#define SFTCFG6_C_TVTET_DIS         (0<<12) // (default)
#define SFTCFG6_C_TVTST_EN          (1<<12)

// sft_cfg6[13]
#define SFTCFG6_D_OSD_TV            (0<<13) // (default)
#define SFTCFG6_D_OSD_PIN           (1<<13)

// sft_cfg6[14]
#define SFTCFG6_E_656_TV            (0<<14) // (default)
#define SFTCFG6_E_656_PIN           (1<<14)




/*
#define GPIOSEL_8_HVSYNC    (1<<8)

//
// GPIO_SEL[]
//

// GPIO_SEL[1:0]
#define GPIOSEL_10_EPP      (0x0<<0)    // EPP
#define GPIOSEL_10_MODEM    (0x1<<0)
#define GPIOSEL_10_UARTS    (0x2<<0)    // 2 UART, for extra GPIO and UART debugging
#define GPIOSEL_10_GPIOS    (0x3<<0)

// GPIO_SEL[5:2]
#define GPIOSEL_52_ATAPI    (0x0<<2)
#define GPIOSEL_52_UDE      (0x1<<2)
#define GPIOSEL_52_UDE2     (0x8<<2)
#define GPIOSEL_52_GPIO     (0xc<<2)

// GPIO_SEL[6]
#define GPIOSEL_6_GPIO      (0<<6)      // 0: RISC_INT3 and IRQE3_L
#define GPIOSEL_6_CLK27M    (1<<6)      // 1: TV-encoder 27M

// GPIO_SEL[7]
#define GPIOSEL_7_GPIO      (0<<7)      // 0: RISC_INT2 and IRQE2_L
#define GPIOSEL_7_PALNTSC   (1<<7)      // 1: O_PAL_NTSC

// GPIO_SEL[8]
#define GPIOSEL_8_HVSYNC_IN (0<<8)      // 0: GPIO
#define GPIOSEL_8_GPIO      (1<<8)      // 1: DSP FL0

// GPIO_SEL[9]
#define GPIOSEL_9_UART_NORMAL   (0<<9)      // 0: UART1/UART2
#define GPIOSEL_9_UART_SWAPPED  (1<<9)      // 1: UART2/UART1

// GPIO_SEL[10]
#define GPIOSEL_A_GPIO20    (0<<10)     // 0: GPIO[20]
#define GPIOSEL_A_FL0       (1<<10)     // 1: DSP FL0

// GPIO_SEL[11]
#define GPIOSEL_B_GPIO21    (0<<11)     // 0: GPIO[21]
#define GPIOSEL_B_FL1       (1<<11)     // 1: DSP FL1

// GPIO_SEL[12]
#define GPIOSEL_C_GPIO59    (0<<12)     // 0: GPIO[59]
#define GPIOSEL_C_FL2       (1<<12)     // 1: DSP FL2

// GPIO_SEL[14:13]
#define GPIOSEL_ED_TVOUT_ALYS   (0<<13)     // 0b00: always output
#define GPIOSEL_ED_TVOUT_TRI    (2<<13)     // 0b10: HZ when GPIOE[2]==1
#define GPIOSEL_ED_TVOUT_TRIN   (3<<13)     // 0b11: HZ when GPIOE[2]==0



//
// GPIO_SEL_AUX
//

// GPIO_SEL_AUX[0]
#define GPIOAUX_0_ROMADDR21 (0<<0)      // 0: ROM_ADDR[21] (default)
#define GPIOAUX_0_GPIO0     (1<<0)      // 1: GPIO[0]

// GPIO_SEL_AUX[1]
#define GPIOAUX_1_ROMADDR20 (0<<1)      // 0: ROM_ADDR[20] (default)
#define GPIOAUX_1_GPIO1     (1<<1)      // 1: GPIO[1]

// GPIO_SEL_AUX[2]
#define GPIOAUX_2_MEMWEB    (0<<2)      // 0: MEMWE_B (default)
#define GPIOAUX_2_GPIO2     (1<<2)      // 1: GPIO[2]

// GPIO_SEL_AUX[3]
#define GPIOAUX_3_MEMOEB    (0<<3)      // 0: MEMOE_B (default)
#define GPIOAUX_3_GPIO12    (1<<3)      // 1: GPIO[12]

// GPIO_SEL_AUX[6:4]
#define GPIOAUX_64_MEMCS3_CSX   (1<<4)      // 000: normal
#define GPIOAUX_64_MEMCS3_CS1   (0<<4)      // 001: direct CS3 to CS1 (for CS1 programming)
#define GPIOAUX_64_MEMCS3_CS2   (2<<4)      // 010: direct CS3 to CS2 (for CS2 programming)
#define GPIOAUX_64_MEMCS3_CS3   (3<<4)      // 011: direct CS3 to CS2 (for CS3 programming)
#define GPIOAUX_64_MEMCS3_GPIO  (4<<4)      // 100: GPIO[15:13]

// GPIO_SEL_AUX[7]
#define GPIOAUX_7_ROMADDR22 (0<<7)      // 0: ROM_ADDR[22]
#define GPIOAUX_7_GPIO16    (1<<7)      // 1: GPIO[16]

// GPIO_SEL_AUX[8]
#define GPIOAUX_8_ROMADDR23 (0<<8)      // 0: ROM_ADDR[23]
#define GPIOAUX_8_GPIO17    (1<<8)      // 1: GPIO[17]

// GPIO_SEL_AUX[9]
#define GPIOAUX_9_ROMADDR24 (0<<9)      // 0: ROM_ADDR[24]
#define GPIOAUX_9_GPIO18    (1<<9)      // 1: GPIO[18]

// GPIO_SEL_AUX[10]
#define GPIOAUX_A_ROMADDR25 (0<<10)     // 0: ROM_ADDR[25]
#define GPIOAUX_A_GPIO19    (1<<10)     // 1: GPIO[19]


// aux: 10
// sel: 00
#define GPIO_SEL_DEFAULT    ( GPIOSEL_10_EPP    \
                | GPIOSEL_52_ATAPI  \
                | GPIOSEL_6_GPIO    \
                | GPIOSEL_7_GPIO    \
                | GPIOSEL_8_HVSYNC_IN   \
                | GPIOSEL_9_UART_NORMAL \
                | GPIOSEL_A_FL0     \
                | GPIOSEL_B_FL1     \
                | GPIOSEL_C_GPIO59  \
                | GPIOSEL_ED_TVOUT_ALYS \
                )

#define GPIO_SEL_AUX_DEFAULT    ( GPIOAUX_0_GPIO0   \
                | GPIOAUX_1_GPIO1   \
                | GPIOAUX_2_GPIO2   \
                | GPIOAUX_3_MEMOEB  \
                | GPIOAUX_64_MEMCS3_CSX \
                | GPIOAUX_7_ROMADDR22   \
                | GPIOAUX_8_ROMADDR23   \
                | GPIOAUX_9_ROMADDR24   \
                | GPIOAUX_A_ROMADDR25   \
                )

*/
//
// generic GPIO operations
// 
#define GPIO_I_GET(a)   ((regs0->gpio_in[a/16] >> (a%16)) & 0x01)
#define GPIO_O_SET(a,d) ((d) ? (regs0->gpio_out[a/16] |= (1<<(a%16))) \
                             : (regs0->gpio_out[a/16] &= ~(1<<(a%16))) )
#define GPIO_E_SET(a,d) ((d) ? (regs0->gpio_oe[a/16] |= (1<<(a%16))) \
                             : (regs0->gpio_oe[a/16] &= ~(1<<(a%16))) )
#define GPIO_M_SET(a,d) ((d) ? (regs0->gpio_master[a/16] |= (1<<(a%16))) \
                             : (regs0->gpio_master[a/16] &= ~(1<<(a%16))) )

#ifdef SPHE8202
	#include "gpio_8202.h"
#else
	#include "gpio_mute_8200.h"
#endif

#ifdef TOP_DOOR_LOADER
	#ifdef USE_2_DOOR_SENSE_GPIO		//gerry,2004-1-10 9:51
    #define GPIO_GET_DOOR_STATUS()          (GPIO_I_GET(DOOR_SENSE_GPIO)|GPIO_I_GET(DOOR_SENSE_GPIO_2))
	#else
    #define GPIO_GET_DOOR_STATUS()          GPIO_I_GET(DOOR_SENSE_GPIO)
    #endif
    #define DOOR_OPEN                       1
#endif //#ifdef TOP_DOOR_LOADER

#ifdef PORTABLE_DVD //Jack for Portable DVD 04/06/03
    #include "gpio_portable.h" //0725 splitted for portable
#endif

//GPIO Function
#ifdef SUPPORT_VIDEO_BUFFER_STANDBY
void video_buff_power_off(void);
void video_buff_power_on(void);
#endif
                             
#ifdef SUPPORT_EXTERNAL_MIC                          
void extern_mic_detect_on(void);
int extern_mic_is_detected(void);
void extern_mic_unmute(void);
void extern_mic_mute(void);

#endif
                             
#ifdef GPIO_KEY_LIGHT
void init_keylight_io(void);
	#if defined(USE_VFD_GAME_PORT_TO_KEYBOARD_HJ)
	void init_hj_keylight_io(void);
	#elif defined(USE_VFDPORT_TO_KEYLIGHT_GBM)
	void init_gbm_keylight_io(void);
	#elif defined(USE_VFDPORT_TO_KEYLIGHT_IDALL)
    void init_idall_keylight_io(void);
    #elif defined(USE_VFDPORT_TO_KEYLIGHT_THAKRAL)
    void init_thakral_keylight_io(void);
	#endif
#endif
                             
#endif/*__GPIO_H*/