auddac.c

Sunplus 8202S source code.

//
// FILE
// auddac.c
//
// DESCRIPTION
// generic auddac control
//
#include "user_init.h"

#if defined(PCM1742)

#include "config.h"
#include "regmap.h"
#include "global.h"
#include "func.h"
#include "gpio.h"
#include "audclk.h"
#include "auddrv.h" //2004AUDDRV oliver 20041004 for using audio driver purpose
//#include "audif.h"
#include "gpio.h"


#ifdef PCM1742
#include "pcm1742.h"
#endif

//
// DVD board version related gpio change
//
#define   GPN_MCDL_MC    3
#define   GPN_MCDL_MD    4
#define   GPN_MCDL_ML_1  2
//
/*
#define GPN_MCDL_MC     3
#define GPN_MCDL_MD     4
#define GPN_MCDL_ML_1   2
*/

/*
#define GPN_MCDL_MC     3
#define GPN_MCDL_MD     2
#define GPN_MCDL_ML_1   4
*/


#define MCDL_MC_SET(d)  GPIO_O_SET(GPN_MCDL_MC,d)
#define MCDL_MD_SET(d)  GPIO_O_SET(GPN_MCDL_MD,d)
#define MCDL_ML1_SET(d) GPIO_O_SET(GPN_MCDL_ML_1,d)

#define MCDL_MC_OUT()   GPIO_E_SET(GPN_MCDL_MC,1)
#define MCDL_MD_OUT()   GPIO_E_SET(GPN_MCDL_MD,1)
#define MCDL_ML1_OUT()  GPIO_E_SET(GPN_MCDL_ML_1,1)


#define delay_mcdl(i)   delay_1us(i)

void    write_mcdl(unsigned data)
{
    int i;

    MCDL_MC_SET(1);
    MCDL_MD_SET(1);
    MCDL_ML1_SET(0);
  
    MCDL_MC_OUT();
    MCDL_MD_OUT();
    MCDL_ML1_OUT();

    for (i=15;i>=0;i--)
    {
        MCDL_MC_SET(0);             delay_mcdl(2);
        MCDL_MD_SET((data>>i)&1);   delay_mcdl(2);
        MCDL_MC_SET(1);             delay_mcdl(2);
    }
    MCDL_ML1_SET(1);

    for (i=1;i>=0;i--)
    {
        MCDL_MC_SET(0);     delay_mcdl(2);
        MCDL_MC_SET(1);     delay_mcdl(2);
    }
}


// 
// FUNTCION
// dac_set_vol()
//
// vol=0: mute
// vol=255: 0-dB attenuation
//
void
dac_set_vol(unsigned vol)
{
    unsigned v;

#if defined(PCM1742)
    v = vol;
    write_mcdl(v | (0x10<<8));        // load and set L volume
    write_mcdl(v | (0x11<<8));        // load and set R volume
#endif
}


//
// FUNCTION
// dac_turn_on()
// DESCRIPTION
// turn on dac
//
void    dac_turn_on()
{
#ifdef PCM1742
    int i;
    for (i=0; i<2; i++) {
        delay_1ms(10);
        //Register-18
        write_mcdl(PCM1742_R18_MUTE_OFF | PCM1742_R18_OVER_SAMPLE_OFF | (0x12<<8));
        delay_1ms(10);
        //Register-19
        write_mcdl(PCM1742_R19_SF_48 | (0x13<<8));
        delay_1ms(10);
        //Register-20
        write_mcdl(
                PCM1742_R20_FMT_24RJ |
                //PCM1742_R20_FMT_I2S |
                (0x14<<8));
    }
#endif

    dac_set_vol(0xff);
}



//Set DAC Sampling frequency
//fs:44.1K/48k
//xck:384fs/256fs

void dac_set_fs(BYTE fs)
{
#ifdef PCM1742
    switch(fs)
    {
        case FS_48K:
            write_mcdl(PCM1742_R18_MUTE_OFF | PCM1742_R18_OVER_SAMPLE_OFF | (0x12<<8));
            write_mcdl(PCM1742_R19_SF_48 | (0x13<<8));
            break;
        case FS_96K:
            write_mcdl(PCM1742_R18_MUTE_OFF | PCM1742_R18_OVER_SAMPLE_ON | (0x12<<8));
            write_mcdl(PCM1742_R19_SF_48 | (0x13<<8));
            break;
        case FS_44K:
        case FS_88K:
            write_mcdl(PCM1742_R18_MUTE_OFF | PCM1742_R18_OVER_SAMPLE_OFF | (0x12<<8));
            write_mcdl(PCM1742_R19_SF_44 | (0x13<<8));
            break;
        case FS_32K:
            write_mcdl(PCM1742_R18_MUTE_OFF | PCM1742_R18_OVER_SAMPLE_OFF | (0x12<<8));
            write_mcdl(PCM1742_R19_SF_32 | (0x13<<8));
            break;
        default:
            write_mcdl(PCM1742_R18_MUTE_OFF | PCM1742_R18_OVER_SAMPLE_OFF | (0x12<<8));
            write_mcdl(PCM1742_R19_SF_44 | (0x13<<8));
            break;
    }
#endif    
}


#endif //#if defined(PCM1742)