ddx8000_binary.c

Sunplus 8202S source code.

	if(updown==1)
	{
		if(amp_userSet.ddx_Treble_lev < 0x0d)
			amp_userSet.ddx_Treble_lev++;
	}
	else if(updown==-1)
	{
		if(amp_userSet.ddx_Treble_lev > 0x1)
			amp_userSet.ddx_Treble_lev--;
	}
	*p = (amp_userSet.ddx_Treble_lev<<4) | (*p & 0x0f);
	WriteToI2c(DDX8K_ADDR,TONE_CTRL_REG,p,1);
	WriteToI2c(0xa0, TREBLE_GAIN_ADDR, &amp_userSet.ddx_Treble_lev, 1);
}	

BYTE  ddx_bassCtrl(int updown) //xulf modified 2004-01-13
{
    BYTE romSum=0;
    BYTE *p = (BYTE *)(&romSum);
    
	ReadFromI2c(DDX8K_ADDR,TONE_CTRL_REG,p,1);
	if(updown==1)
	{
		if(amp_userSet.ddx_Bass_lev < 0x0d)      
			amp_userSet.ddx_Bass_lev++;
	}
	else if(updown==-1)
	{
		if(amp_userSet.ddx_Bass_lev > 0x1)
			amp_userSet.ddx_Bass_lev--;
	}
	*p = amp_userSet.ddx_Bass_lev | (*p & 0xf0);
	WriteToI2c(DDX8K_ADDR,TONE_CTRL_REG,p,1);
	WriteToI2c(0xa0, BASS_GAIN_ADDR, &amp_userSet.ddx_Bass_lev, 1);
}

//volume control:  include master volume control and channel volume control
//input:
/*
updown:  1---boost,  -1---cut
mute:    1---Hard Master Mute,  0---not mute,adjust volume
*/
void ddx_master_volume_adjust(int updown,BYTE mute)
{
    BYTE tmp_var;
    
    if(mute)
    {
		amp_userSet.mainvol = 0xff;
		WriteToI2c(DDX8K_ADDR,MASTER_VOL_REG,&amp_userSet.mainvol,1);
		return;
    }
    else
    {
//    	ddx_masterMute(1);
		ReadFromI2c(DDX8K_ADDR,MASTER_VOL_REG,&amp_userSet.mainvol,1);
		tmp_var = amp_userSet.mainvol;
    	if(updown==1)
    	{
    		if(tmp_var>0x00)
    			tmp_var--;
    	}
    	else if(updown==-1)
    			tmp_var++;
    	if(*lev_list[0]==1)
    		tmp_var = 0x31;
    	else if(*lev_list[0]==0)
    		tmp_var = 0xff;
    	amp_userSet.mainvol = tmp_var;
    	WriteToI2c(DDX8K_ADDR,MASTER_VOL_REG,&amp_userSet.mainvol,1);
		WriteToI2c(0xa0,AMP_I2CADDR_START+(2*y_index),lev_list[y_index],1);
		WriteToI2c(0xa0,AMP_I2CADDR_START+(2*y_index + 1),&amp_userSet.mainvol,1);
//    	ddx_masterMute(0);
    }
}

//Set Master Volume Gain
void ddx_setMVG(BYTE chAddr,BYTE ctrl)
{
	WriteToI2c(DDX8K_ADDR,chAddr,&ctrl,1);
}
//input:
/*
chAddr:  channel volume regsiter address
updown:  1---boost,  -1---cut
*/

void ddx_channel_volume_adjust(BYTE chAddr,int updown)
{
//    UINT16      romSum=0;
    BYTE *p = (BYTE *)(&amp_userSet);
    BYTE tmp_var;
	
//	ddx_masterMute(1);
	ReadFromI2c(DDX8K_ADDR,chAddr,p,1);
	tmp_var = *(p+(2*y_index+1));
	if(updown==1)
	{
		if(tmp_var>0x00)
			tmp_var -=1;
	}
	else if(updown==-1)
	{
		if(tmp_var<0xfe)
			tmp_var +=1;
	}
	*(p+(2*y_index+1)) = tmp_var;
	WriteToI2c(DDX8K_ADDR,chAddr,(p+(2*y_index+1)),1);
	WriteToI2c(0xa0,AMP_I2CADDR_START+(2*y_index),lev_list[y_index],1);
	WriteToI2c(0xa0,AMP_I2CADDR_START+(2*y_index + 1),(p+(2*y_index+1)),1);
//	ddx_masterMute(0);
}

//Set Channel Volume Gain
void ddx_setCVG(BYTE chAddr,BYTE ctrl)
{
	WriteToI2c(DDX8K_ADDR,chAddr,&ctrl,1);
}

//all changes in volume take place at digital zero-crossing
//will create the smoothest possible volume transition
void ddx_enZeroCross(void)
{
	write_reg_bit(CONFIGREG_B,6,1);
}
void ddx_disZeroCross(void)
{//volume updates immediately
	write_reg_bit(CONFIGREG_B,6,0);
}

//Master Volume Mute
//mute all channels simultaneously
//mute   1: mute       0: demute
void ddx_masterMute(BYTE mute)
{
	if(mute)
		write_reg_bit(MASTER_MUTE_REG,0,1);
	else
		write_reg_bit(MASTER_MUTE_REG,0,0);
}

//channel mute individually
//mute   1: mute       0: demute
void ddx_channelMute(BYTE chNum,BYTE mute)
{
	if(mute)
		write_reg_bit(CHANEL_MUTE_REG,chNum,1);
	else
		write_reg_bit(CHANEL_MUTE_REG,chNum,0);
}

//Channel Limiter Selection
/*
CxLS(1,0)   Channel Limiter Mapping
-------------------------------------------
   00       Channel has limiting disabled
   01       Channel is mapped to limiter #1
   10       Channel is mapped to limiter #2
   11       Reserved.Don't use this setting
--------------------------------------------
*/
void ddx_ch1_limiterSel(BYTE selCtrl)
{
	BYTE data;
	ReadFromI2c(DDX8K_ADDR,CLIMITER_SEL0,&data,1);
	data = selCtrl | (data & 0xfc); 
	if(selCtrl<0x03)
		WriteToI2c(DDX8K_ADDR,CLIMITER_SEL0,&data,1);
}

void ddx_ch2_limiterSel(BYTE selCtrl)
{
	BYTE data;
	ReadFromI2c(DDX8K_ADDR,CLIMITER_SEL0,&data,1);
	data = (selCtrl << 2) | (data & 0xf3); 
	if(selCtrl<0x03)
		WriteToI2c(DDX8K_ADDR,CLIMITER_SEL0,&data,1);
}

void ddx_ch3_limiterSel(BYTE selCtrl)
{
	BYTE data;
	ReadFromI2c(DDX8K_ADDR,CLIMITER_SEL0,&data,1);
	data = (selCtrl << 4) | (data & 0xcf); 
	if(selCtrl<0x03)
		WriteToI2c(DDX8K_ADDR,CLIMITER_SEL0,&data,1);
}
void ddx_ch4_limiterSel(BYTE selCtrl)
{
	BYTE data;
	ReadFromI2c(DDX8K_ADDR,CLIMITER_SEL0,&data,1);
	data = (selCtrl << 6) | (data & 0x3f); 
	if(selCtrl<0x03)
		WriteToI2c(DDX8K_ADDR,CLIMITER_SEL0,&data,1);
}
void ddx_ch5_limiterSel(BYTE selCtrl)
{
	BYTE data;
	ReadFromI2c(DDX8K_ADDR,CLIMITER_SEL1,&data,1);
	data = selCtrl | (data & 0xfc); 
	if(selCtrl<0x03)
		WriteToI2c(DDX8K_ADDR,CLIMITER_SEL1,&data,1);
}

void ddx_ch6_limiterSel(BYTE selCtrl)
{
	BYTE data;
	ReadFromI2c(DDX8K_ADDR,CLIMITER_SEL1,&data,1);
	data = (selCtrl << 2) | (data & 0xf3); 
	if(selCtrl<0x03)
		WriteToI2c(DDX8K_ADDR,CLIMITER_SEL1,&data,1);
}

void ddx_ch7_limiterSel(BYTE selCtrl)
{
	BYTE data;
	ReadFromI2c(DDX8K_ADDR,CLIMITER_SEL1,&data,1);
	data = (selCtrl << 4) | (data & 0xcf); 
	if(selCtrl<0x03)
		WriteToI2c(DDX8K_ADDR,CLIMITER_SEL1,&data,1);
}
void ddx_ch8_limiterSel(BYTE selCtrl)
{
	BYTE data;
	ReadFromI2c(DDX8K_ADDR,CLIMITER_SEL1,&data,1);
	data = (selCtrl << 6) | (data & 0x3f); 
	if(selCtrl<0x03)
		WriteToI2c(DDX8K_ADDR,CLIMITER_SEL1,&data,1);
}

//Set Compression and Release Rates of Limiter
void ddx_setL1CRrates(BYTE ctrl)
{
	WriteToI2c(DDX8K_ADDR,L1RATE_REG,&ctrl,1);
}

void ddx_setL2CRrates(BYTE ctrl)
{
	WriteToI2c(DDX8K_ADDR,L2RATE_REG,&ctrl,1);
}

//Set Compression and Release Threshold of Limiter
void ddx_setL1CRthreshold(BYTE ctrl)
{
	WriteToI2c(DDX8K_ADDR,L1THRESHOLDS_REG,&ctrl,1);
}

void ddx_setL2CRthreshold(BYTE ctrl)
{
	WriteToI2c(DDX8K_ADDR,L2THRESHOLDS_REG,&ctrl,1);
}

//Set Dynamic Range Compression mode
//drc: 1----Dynamic Range Compression mode
//     0----Anti-Clipping Mode(default)
void ddx_setDRCmode(BYTE drc)
{
	write_reg_bit(CONFIGREG_B,7,drc);
}

//Set Max Power Correction
void ddx_setMPC(void)
{
	write_reg_bit(CONFIGREG_A,7,1);
}
//Head Phone Enable or Disable
void ddx_enHeadPhone(void)
{
	write_reg_bit(CONFIGREG_A,6,1);
}
void ddx_disHeadPhone(void)
{
	write_reg_bit(CONFIGREG_A,6,0);
}

//AM Mode Enable or Disable
void ddx_enableAM_mode(void)
{
	write_reg_bit(CONFIGREG_F,3,1);
}
void ddx_disableAM_mode(void)
{
	write_reg_bit(CONFIGREG_F,3,0);
}

void ddx_set_BassManagement(void)
{
	coef_factor bass_coef;
	//set channel 7,5,4,2,1 pre-scale factor
    ddx_writeCoefVal(0xd6,FL_SCALE_FACTOR);  //xulf 2003-12-15
    ddx_writeCoefVal(0xd4,FR_SCALE_FACTOR);
    ddx_writeCoefVal(0xd3,SL_SCALE_FACTOR);
    ddx_writeCoefVal(0xd1,SR_SCALE_FACTOR);
    ddx_writeCoefVal(0xd0,CE_SCALE_FACTOR);
    ddx_writeCoefVal(0xd5,LFE_SCALE_FACTOR);
    
	//set channel 7,5,4,2,1 filter coefficient
	bass_coef.b2 = HPF_COEF_B2;
	bass_coef.b0 = HPF_COEF_B0;
	bass_coef.a2 = HPF_COEF_A2;
	bass_coef.a1 = HPF_COEF_A1;
	bass_coef.b1 = HPF_COEF_B1;
	ddx_writeCoefValSets(0x96,bass_coef);  //channel 7    xulf 2003-12-15
	ddx_writeCoefValSets(0x64,bass_coef);  //channel 5
	ddx_writeCoefValSets(0x4b,bass_coef);  //channel 4
	ddx_writeCoefValSets(0x19,bass_coef);  //channel 2
	ddx_writeCoefValSets(0x00,bass_coef);  //channel 1
	
	//set channel 6 filter coefficient
	bass_coef.b2 = LPF_COEF_B2;
	bass_coef.b0 = LPF_COEF_B0;
	bass_coef.a2 = LPF_COEF_A2;
	bass_coef.a1 = LPF_COEF_A1;
	bass_coef.b1 = LPF_COEF_B1;
	ddx_writeCoefValSets(0x7d,bass_coef);
}

//Initialize volume gain
void ddx_init_volumeGain(void)
{
	//set volume gain 
	ddx_setMVG(MASTER_VOL_REG,0x6c/*-54dB*/);
	ddx_setCVG(C7V_REG,0x18);//12dB
	ddx_setCVG(C5V_REG,0x18);//12dB
	ddx_setCVG(C4V_REG,0x18);//12dB
	ddx_setCVG(C2V_REG,0x18);//12dB
	ddx_setCVG(C1V_REG,0x18);//12dB
	ddx_setCVG(C6V_REG,0x10);//16dB
	ddx_setCVG(C3V_REG,0xff);           //xulf 2003-12-15
	ddx_setCVG(C8V_REG,0xff);
}
//Initialization
void ddx_initialization(void)
{
	BYTE data;
/*	//disable external amplifier
	ddx_disableEPAD();
	//mute all channels
	ddx_masterMute(1);
*/
	enable_hpf();
	NOP;
	set_inputClock(0x00,0x03);//256Fs
	NOP;
	//set input data format
	//set input data format   :DVD,VCD,MP3,CD,
#if defined(WM8746)//Right-Justified 24-bit Data
	set_inputData_format(0x05);
#elif defined(WM8746I2S24)//I2S 24-bit Data
	set_inputData_format(0x00);
#endif
//	BYTE data = 0x27;
//	WriteToI2c(DDX8K_ADDR,0x03,&data,1);
	
	//enable bass management
	//ddx_enable_BassManagement();
	//Enable Zero Crossing
	//ddx_enZeroCross();
	//set Anti-clipping Mode for 5.1 Channels
	//ddx_setDRCmode(0);
	//initialize volume gain
	//ddx_init_volumeGain();
	//set bass management
	//ddx_set_BassManagement();
	//limiter selection: channel 7,5,4,2,1 select limiter 1
	//channel 6 select limiter 2
	/*ddx_ch7_limiterSel(0x01);
	ddx_ch5_limiterSel(0x01);
	ddx_ch4_limiterSel(0x01);
	ddx_ch2_limiterSel(0x01);
	ddx_ch1_limiterSel(0x01);
	ddx_ch6_limiterSel(0x02);*/
	//set limiter 1,2 Attack Rate and Release Rate
	//ddx_setL1CRrates(0xa4);
	//ddx_setL2CRrates(0xf7);
	//set limiter 1,2 Attack Threshold and Release Threshold
	//ddx_setL1CRthreshold(0x65);
	//ddx_setL1CRthreshold(0x75);
	
	data=0x2f;              //xulf 2003-12-17
	WriteToI2c(DDX8K_ADDR,CONFIGREG_D,&data,1);  
    //channel mapping via I2C
    //output: 7 5 4 2 1 6=====input: 1 2 3 4 5 6
	data = 0x34;