wireless_api.lst
来自「菜鸟，详细NRF24E1运用，程序，电路」· LST 代码 · 共 512 行 · 第 1/2 页
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236 1
C51 COMPILER V9.00 WIRELESS_API 11/09/2010 16:31:12 PAGE 5
237 1 irq_status=Rf24L01_ReadByte(STATUS);//read state word
238 1
239 1 switch(irq_status&MASK_IRQ_FLAGS) //取4 5 6 bit
240 1 {
241 2 case MASK_RX_DR_FLAG: //rf receive data
242 2 {
243 3 if(Rf24L01_ReadByte(FIFO_STATUS) & MASK_RX_EMPTY)//empty fifo
244 3 {
245 4 irq_status =IDLE;
246 4 }
247 3 else
248 3 {
249 4 Rf24L01_RX(rev_buf);
250 4 gnDataPipeNumber=(irq_status>>1)&0x7;
251 4 irq_status = (unsigned char)RX_DR;
252 4 }
253 3
254 3 break;
255 3 }
256 2
257 2
258 2
259 2 case MASK_TX_DS_FLAG: //send rf data success (with ack response)
260 2 {
261 3 irq_status = (unsigned char)TX_DS;
262 3 break;
263 3 }
264 2
265 2 case MASK_MAX_RT_FLAG: //Maximum number of TX retries interrupt If MAX_RT is set it must be cle
-ared to enable further communication.
266 2 {
267 3 irq_status = (unsigned char)MAX_RT;
268 3 break;
269 3 }
270 2
271 2 case IDLE:
272 2 {
273 3 irq_status = (unsigned char)IDLE;
274 3 break;
275 3 }
276 2
277 2 }
278 1
279 1 if(Rf24L01_ReadByte(FIFO_STATUS) & MASK_RX_EMPTY) // if empty clear interrupt RQ
280 1 Rf24L01_Clear_IRQ(MASK_IRQ_FLAGS);
281 1
282 1 return irq_status;
283 1
284 1 }
285
286
287 //-----------------------------------------------------------------------------
288
289 unsigned char Rf24L01_Set_Init(SetupData *drc)
290 {
291 1 unsigned char btemp;
292 1
293 1 RFCKEN = 1; // enable L01 clock
294 1 RF = 0; //rf中断清零
295 1 CE_LOW(); //选中RF芯片
296 1
297 1 Rf24L01_Flush_RX(); //flush TX/RX FIFO to be empty
C51 COMPILER V9.00 WIRELESS_API 11/09/2010 16:31:12 PAGE 6
298 1 Rf24L01_Flush_TX(); //
299 1 Rf24L01_Clear_IRQ(MASK_IRQ_FLAGS); //clear IRQ STATUS register
300 1
301 1 //------------------------------------------------------
302 1 //1 set config
303 1 //------------------------------------------------------
304 1 //'comm config' default value:0000 1000
305 1 //bit7 must be 0;
306 1 //bit6,0--enable,RX interrupt enable,IRQ pin active low
307 1 //bit5,0--enable TX Succeed interrupt enable,IRQ pin active low
308 1 //bit4,0--eanble TX time over interrupt enable,IRQ pin active low
309 1 //bit3,CRC enable,if EN_AA be set,this bit will be forced to high
310 1 //bit2,CRC width,0--one byte,1--two bytes
311 1 //bit1,RF POWER ON/OFF,1--ON, 0--OFF
312 1 //bit0,transmmit mode: 1--PTX,0--PRX
313 1 btemp =0x0e;
314 1 if (drc->nOn == Dev_Normal) btemp +=0x01;
315 1 Rf24L01_WriteByte(WRITE_REG + CONFIG, btemp);
316 1
317 1 //------------------------------------------------------
318 1 //2 set ee_aa
319 1 //------------------------------------------------------
320 1 //'Enable Auto Acknowledgment'
321 1 // bit76 must be 00;
322 1 // bit 5-0 response to Pip5-0; bit: 1-en, 0-disen
323 1 // bit0 = 1;only enble pipe0
324 1 // Enable Auto.Ack:Pipe0
325 1
326 1 Rf24L01_WriteByte(WRITE_REG + EN_AA, drc->nAutoAck);
327 1
328 1 //------------------------------------------------------
329 1 //3 set en_rxaddr
330 1 //------------------------------------------------------
331 1 //'Enabled RX addresses', default 0000 0011
332 1 //bit76 must be 00;
333 1 //bit 5-0 response to Pip5-0, bit: 1-en, 0-disen
334 1 //pipe rx enble,bit0 = 1,only enable pipe0 RX
335 1 Rf24L01_WriteByte(WRITE_REG + EN_RXADDR, drc->nRecvAddr);
336 1
337 1 //------------------------------------------------------
338 1 //4 set setup_aw
339 1 //------------------------------------------------------
340 1 //'address width',default 0000 0011
341 1 //bit765432 must be 000000;
342 1 //bit10,value must be 1~3, 1--3Bytes width,2--4Bytes,3--5Bytes
343 1 //address width is 5 bytes;bit10: 00--illegal,01--3bytes,10--4bytes,11--5bytes
344 1 Rf24L01_WriteByte(WRITE_REG + SETUP_AW, 0x03);
345 1
346 1 //------------------------------------------------------
347 1 //5 set setup_retr
348 1 //------------------------------------------------------
349 1 //'Auto. Retransmite delay time and count', default 0000 0011
350 1 //delay time(bit7~3):(bit7~3+1)*250+86us;
351 1 //retran count(bit2~0):0--disenable retran,otherwise 1~15 times
352 1 //0x10;
353 1 //retran delay time:250us+86us
354 1 //drc->Retran;
355 1 btemp = (drc->nART_Factor&0x0f)<<4;
356 1 btemp += (drc->nRetran > 15 ? 15 : drc->nRetran);
357 1 btemp=0x17;//self
358 1 Rf24L01_WriteByte(WRITE_REG + SETUP_RETR, btemp);
359 1
C51 COMPILER V9.00 WIRELESS_API 11/09/2010 16:31:12 PAGE 7
360 1 //------------------------------------------------------
361 1 //6 set rf_ch
362 1 //------------------------------------------------------
363 1 //'rf frequency channel' 2400+rf_ch,default:0000 0010
364 1 // bit7 must be 0
365 1 // bit6~0 rf frequency channel,one step deputy 1MHZ
366 1 // we use frequency at less than 2.49GHZ,beause WLAN use frequency band 2.4G~2.4835Ghz
367 1 // we choice rf_ch = 100; thats 2.5GHZ
368 1 // default we choice frequency range 2.495GHz~2.513GHZ channel
369 1 if (drc->nChannel>122)
370 1 {
371 2 drc->nChannel = 0;
372 2 }
373 1
374 1 Rf24L01_WriteByte(WRITE_REG + RF_CH, drc->nChannel);
375 1
376 1 //------------------------------------------------------
377 1 //7 set rf_setup
378 1 //------------------------------------------------------
379 1 //'RF setup' default 0000 1111
380 1 // bit7~4 must be 00000
381 1 // bit 3 data rate :0--1Mbps,1--2Mbps;
382 1 // bit 2~1 rf power:00,-18dbm,,01,-12dbm,,10,-6dbm,,11,0dbm
383 1 // bit 0 must be 1
384 1 btemp =((drc->nPower&0x0f)>3 ? 3:(drc->nPower&0x0f))<<1;
385 1 btemp +=0x01;
386 1 if((drc->nPower&0xf0)>0) btemp += 0x08;
387 1
388 1 //btemp |= 0x20;
389 1 btemp=0x0e; //self
390 1 Rf24L01_WriteByte(WRITE_REG + RF_SETUP, btemp);
391 1
392 1 //------------------------------------------------------
393 1 //8 set rx_addr_p0
394 1 //------------------------------------------------------
395 1 //pipe0 rx address buf
396 1
397 1 Rf24L01_WriteMultiByte(WRITE_REG + RX_ADDR_P0,drc->aAddr1,5);
398 1
399 1 //------------------------------------------------------
400 1 //9 set rx_addr_p1
401 1 //------------------------------------------------------
402 1 //'pipe1 rx payload width'
403 1 //'pipe0 rx payload width' 00000000
404 1 //bit76 must be 00
405 1 //bit5~0,at less than must be one byte
406 1 //the most width is 32 bytes
407 1 if (drc->nLen>32)
408 1 {
409 2 drc->nLen = 32;
410 2 }
411 1 else if (drc->nLen == 0)
412 1 {
413 2 drc->nLen = 1;
414 2 }
415 1
416 1 Rf24L01_WriteByte(WRITE_REG + RX_PW_P0, drc->nLen);
417 1
418 1 btemp = drc->nRecvAddr;
419 1 btemp = btemp>>1;
420 1 if (btemp&1)
421 1 {
C51 COMPILER V9.00 WIRELESS_API 11/09/2010 16:31:12 PAGE 8
422 2 //81 get rx_addr_p1
423 2 Rf24L01_WriteMultiByte(WRITE_REG + RX_ADDR_P1,drc->aAddr2,5);
424 2
425 2 //91 get rx_pw_p1
426 2 Rf24L01_WriteByte(WRITE_REG + RX_PW_P1, drc->nLen);
427 2 }
428 1
429 1 //------------------------------------------------------
430 1 //10 set tx_addr
431 1 //------------------------------------------------------
432 1 //tx address buf
433 1 Rf24L01_WriteMultiByte(WRITE_REG + TX_ADDR,drc->aAddr1,5);
434 1
435 1
436 1 //------------------------------------------------------
437 1 //11 ACTIVATE
438 1 //------------------------------------------------------
439 1 // Rf24L01_WriteByte(ACTIVATE, 0x73);
440 1
441 1 //------------------------------------------------------
442 1 //12 get FEATURE
443 1 //------------------------------------------------------
444 1 Rf24L01_WriteByte(WRITE_REG + FEATURE, 0x05);
445 1
446 1 //------------------------------------------------------
447 1 //13 get DYNPD
448 1 //------------------------------------------------------
449 1 Rf24L01_WriteByte(WRITE_REG + DYNPD, drc->nRecvAddr);
450 1
451 1
452 1 RF = 1;
453 1 if(drc->nOn == Dev_Normal)
454 1 {
455 2 CE_HIGH();
456 2 }
457 1
458 1 return 0;
459 1 }
460
461 void wireless_init(void)
462 {
463 1 SetupData mSetup;
464 1
465 1 memset(&mSetup,0,sizeof(SetupData)); //chu shi hua wei 0
466 1 mSetup.nChannel=20;
467 1 mSetup.nPower=3; //0dbm
468 1 mSetup.nRecvAddr=0x01;
469 1 mSetup.nAutoAck=0x01;
470 1 mSetup.nLen=32;
471 1 mSetup.nRetran=8;
472 1 mSetup.nOn=1;
473 1
474 1 memcpy(mSetup.aAddr1,address,5); //copy the address
475 1 mSetup.nOn=1;
476 1
477 1 Rf24L01_Set_Init((SetupData *)&mSetup);
478 1
479 1 }
C51 COMPILATION COMPLETE. 3 WARNING(S), 1 ERROR(S)
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