56807.h

一个串口终端解释程序。用于单片机调试串口的超级终端应用。

/*-----------------------------------------------------------------------*
* Copyright (c) 2002,北京四方同创保护与控制设备有限公司稳控事业部
* All rights reserved.
* 
* 文件名称：56807.H
* 摘    要：DSP56F807内部寄存器定义
* 当前版本：1.0
* 作    者：胡炯
* 完成日期：2002年11月7日
*-----------------------------------------------------------------------*/

#ifndef	_56807_H
#define _56807_H

/* On-Chip Core Configuration Registers */
#define OPGDBR		(unsigned int *)0xffff
#define IPR			(unsigned int *)0xfffb
#define BCR			(unsigned int *)0xfff9


/* System Integration Module (SIM) */
#define SYS_BASE	0x1000

#define SYS_CTRL	(unsigned int *)(SYS_BASE + 0x0 )
#define SYS_STS		(unsigned int *)(SYS_BASE + 0x1 )
#define MSH_ID		(unsigned int *)(SYS_BASE + 0x6 )
#define LSH_ID		(unsigned int *)(SYS_BASE + 0x7 )
#define TST_REG0	(unsigned int *)(SYS_BASE + 0x18)
#define TST_REG1	(unsigned int *)(SYS_BASE + 0x19)
#define TST_REG2	(unsigned int *)(SYS_BASE + 0x1a)
#define TST_REG3	(unsigned int *)(SYS_BASE + 0x1b)
#define TST_REG4	(unsigned int *)(SYS_BASE + 0x1c)


/* Program Flash Interface Unit (PFIU2) */
#define PFIU2_BASE		0x1420

#define PFIU2_CNTL		(unsigned int *)(PFIU2_BASE + 0x0 )
#define PFIU2_PE		(unsigned int *)(PFIU2_BASE + 0x1 )
#define PFIU2_EE		(unsigned int *)(PFIU2_BASE + 0x2 )
#define PFIU2_ADDR		(unsigned int *)(PFIU2_BASE + 0x3 )
#define PFIU2_DATA		(unsigned int *)(PFIU2_BASE + 0x4 )
#define PFIU2_IE		(unsigned int *)(PFIU2_BASE + 0x5 )
#define PFIU2_IS		(unsigned int *)(PFIU2_BASE + 0x6 )
#define PFIU2_IP		(unsigned int *)(PFIU2_BASE + 0x7 )
#define PFIU2_CKDVISOR	(unsigned int *)(PFIU2_BASE + 0x8 )
#define PFIU2_TERASEL	(unsigned int *)(PFIU2_BASE + 0x9 )
#define PFIU2_TMEL		(unsigned int *)(PFIU2_BASE + 0xa )
#define PFIU2_TNVSL		(unsigned int *)(PFIU2_BASE + 0xb )
#define PFIU2_TPGSL		(unsigned int *)(PFIU2_BASE + 0xc )
#define PFIU2_TPROGL	(unsigned int *)(PFIU2_BASE + 0xd )
#define PFIU2_TVHL		(unsigned int *)(PFIU2_BASE + 0xe )
#define PFIU2_TVH1L		(unsigned int *)(PFIU2_BASE + 0xf )
#define PFIU2_TRCVL		(unsigned int *)(PFIU2_BASE + 0x10)
                     

/* Quad timer */
#define TMRA_BASE	0x1100

#define TMRA0_CMP1		(unsigned int *)(TMRA_BASE + 0x0)
#define TMRA0_CMP2		(unsigned int *)(TMRA_BASE + 0x1)
#define TMRA0_CAP		(unsigned int *)(TMRA_BASE + 0x2)
#define TMRA0_LOAD		(unsigned int *)(TMRA_BASE + 0x3)
#define TMRA0_HOLD		(unsigned int *)(TMRA_BASE + 0x4)
#define TMRA0_CNTR		(unsigned int *)(TMRA_BASE + 0x5)
#define TMRA0_CTRL		(unsigned int *)(TMRA_BASE + 0x6)
#define TMRA0_SCR		(unsigned int *)(TMRA_BASE + 0x7)
                        
#define TMRA1_CMP1		(unsigned int *)(TMRA_BASE + 0x8)
#define TMRA1_CMP2		(unsigned int *)(TMRA_BASE + 0x9)
#define TMRA1_CAP		(unsigned int *)(TMRA_BASE + 0xa)
#define TMRA1_LOAD		(unsigned int *)(TMRA_BASE + 0xb)
#define TMRA1_HOLD		(unsigned int *)(TMRA_BASE + 0xc)
#define TMRA1_CNTR		(unsigned int *)(TMRA_BASE + 0xd)
#define TMRA1_CTRL		(unsigned int *)(TMRA_BASE + 0xe)
#define TMRA1_SCR		(unsigned int *)(TMRA_BASE + 0xf)
                        
#define TMRA2_CMP1		(unsigned int *)(TMRA_BASE + 0x10)
#define TMRA2_CMP2		(unsigned int *)(TMRA_BASE + 0x11)
#define TMRA2_CAP		(unsigned int *)(TMRA_BASE + 0x12)
#define TMRA2_LOAD		(unsigned int *)(TMRA_BASE + 0x13)
#define TMRA2_HOLD		(unsigned int *)(TMRA_BASE + 0x14)
#define TMRA2_CNTR		(unsigned int *)(TMRA_BASE + 0x15)
#define TMRA2_CTRL		(unsigned int *)(TMRA_BASE + 0x16)
#define TMRA2_SCR		(unsigned int *)(TMRA_BASE + 0x17)
                        
#define TMRA3_CMP1		(unsigned int *)(TMRA_BASE + 0x18)
#define TMRA3_CMP2		(unsigned int *)(TMRA_BASE + 0x19)
#define TMRA3_CAP		(unsigned int *)(TMRA_BASE + 0x1a)
#define TMRA3_LOAD		(unsigned int *)(TMRA_BASE + 0x1b)
#define TMRA3_HOLD		(unsigned int *)(TMRA_BASE + 0x1c)
#define TMRA3_CNTR		(unsigned int *)(TMRA_BASE + 0x1d)
#define TMRA3_CTRL		(unsigned int *)(TMRA_BASE + 0x1e)
#define TMRA3_SCR		(unsigned int *)(TMRA_BASE + 0x1f)


#define TMRB_BASE	0x1120

#define TMRB0_CMP1		(unsigned int *)(TMRB_BASE + 0x0)
#define TMRB0_CMP2		(unsigned int *)(TMRB_BASE + 0x1)
#define TMRB0_CAP		(unsigned int *)(TMRB_BASE + 0x2)
#define TMRB0_LOAD		(unsigned int *)(TMRB_BASE + 0x3)
#define TMRB0_HOLD		(unsigned int *)(TMRB_BASE + 0x4)
#define TMRB0_CNTR		(unsigned int *)(TMRB_BASE + 0x5)
#define TMRB0_CTRL		(unsigned int *)(TMRB_BASE + 0x6)
#define TMRB0_SCR		(unsigned int *)(TMRB_BASE + 0x7)

#define TMRB1_CMP1		(unsigned int *)(TMRB_BASE + 0x8)
#define TMRB1_CMP2		(unsigned int *)(TMRB_BASE + 0x9)
#define TMRB1_CAP		(unsigned int *)(TMRB_BASE + 0xa)
#define TMRB1_LOAD		(unsigned int *)(TMRB_BASE + 0xb)
#define TMRB1_HOLD		(unsigned int *)(TMRB_BASE + 0xc)
#define TMRB1_CNTR		(unsigned int *)(TMRB_BASE + 0xd)
#define TMRB1_CTRL		(unsigned int *)(TMRB_BASE + 0xe)
#define TMRB1_SCR		(unsigned int *)(TMRB_BASE + 0xf)

#define TMRB2_CMP1		(unsigned int *)(TMRB_BASE + 0x10)
#define TMRB2_CMP2		(unsigned int *)(TMRB_BASE + 0x11)
#define TMRB2_CAP		(unsigned int *)(TMRB_BASE + 0x12)
#define TMRB2_LOAD		(unsigned int *)(TMRB_BASE + 0x13)
#define TMRB2_HOLD		(unsigned int *)(TMRB_BASE + 0x14)
#define TMRB2_CNTR		(unsigned int *)(TMRB_BASE + 0x15)
#define TMRB2_CTRL		(unsigned int *)(TMRB_BASE + 0x16)
#define TMRB2_SCR		(unsigned int *)(TMRB_BASE + 0x17)

#define TMRB3_CMP1		(unsigned int *)(TMRB_BASE + 0x18)
#define TMRB3_CMP2		(unsigned int *)(TMRB_BASE + 0x19)
#define TMRB3_CAP		(unsigned int *)(TMRB_BASE + 0x1a)
#define TMRB3_LOAD		(unsigned int *)(TMRB_BASE + 0x1b)
#define TMRB3_HOLD		(unsigned int *)(TMRB_BASE + 0x1c)
#define TMRB3_CNTR		(unsigned int *)(TMRB_BASE + 0x1d)
#define TMRB3_CTRL		(unsigned int *)(TMRB_BASE + 0x1e)
#define TMRB3_SCR		(unsigned int *)(TMRB_BASE + 0x1f)


#define TMRC_BASE	0x1140

#define TMRC0_CMP1		(unsigned int *)(TMRC_BASE + 0x0)
#define TMRC0_CMP2		(unsigned int *)(TMRC_BASE + 0x1)
#define TMRC0_CAP		(unsigned int *)(TMRC_BASE + 0x2)
#define TMRC0_LOAD		(unsigned int *)(TMRC_BASE + 0x3)
#define TMRC0_HOLD		(unsigned int *)(TMRC_BASE + 0x4)
#define TMRC0_CNTR		(unsigned int *)(TMRC_BASE + 0x5)
#define TMRC0_CTRL		(unsigned int *)(TMRC_BASE + 0x6)
#define TMRC0_SCR		(unsigned int *)(TMRC_BASE + 0x7)

#define TMRC1_CMP1		(unsigned int *)(TMRC_BASE + 0x8)
#define TMRC1_CMP2		(unsigned int *)(TMRC_BASE + 0x9)
#define TMRC1_CAP		(unsigned int *)(TMRC_BASE + 0xa)
#define TMRC1_LOAD		(unsigned int *)(TMRC_BASE + 0xb)
#define TMRC1_HOLD		(unsigned int *)(TMRC_BASE + 0xc)
#define TMRC1_CNTR		(unsigned int *)(TMRC_BASE + 0xd)
#define TMRC1_CTRL		(unsigned int *)(TMRC_BASE + 0xe)
#define TMRC1_SCR		(unsigned int *)(TMRC_BASE + 0xf)

#define TMRC2_CMP1		(unsigned int *)(TMRC_BASE + 0x10)
#define TMRC2_CMP2		(unsigned int *)(TMRC_BASE + 0x11)
#define TMRC2_CAP		(unsigned int *)(TMRC_BASE + 0x12)
#define TMRC2_LOAD		(unsigned int *)(TMRC_BASE + 0x13)
#define TMRC2_HOLD		(unsigned int *)(TMRC_BASE + 0x14)
#define TMRC2_CNTR		(unsigned int *)(TMRC_BASE + 0x15)
#define TMRC2_CTRL		(unsigned int *)(TMRC_BASE + 0x16)
#define TMRC2_SCR		(unsigned int *)(TMRC_BASE + 0x17)

#define TMRC3_CMP1		(unsigned int *)(TMRC_BASE + 0x18)
#define TMRC3_CMP2		(unsigned int *)(TMRC_BASE + 0x19)
#define TMRC3_CAP		(unsigned int *)(TMRC_BASE + 0x1a)
#define TMRC3_LOAD		(unsigned int *)(TMRC_BASE + 0x1b)
#define TMRC3_HOLD		(unsigned int *)(TMRC_BASE + 0x1c)
#define TMRC3_CNTR		(unsigned int *)(TMRC_BASE + 0x1d)
#define TMRC3_CTRL		(unsigned int *)(TMRC_BASE + 0x1e)
#define TMRC3_SCR		(unsigned int *)(TMRC_BASE + 0x1f)


#define TMRD_BASE	0x1160

#define TMRD0_CMP1		(unsigned int *)(TMRD_BASE + 0x0)
#define TMRD0_CMP2		(unsigned int *)(TMRD_BASE + 0x1)
#define TMRD0_CAP		(unsigned int *)(TMRD_BASE + 0x2)
#define TMRD0_LOAD		(unsigned int *)(TMRD_BASE + 0x3)
#define TMRD0_HOLD		(unsigned int *)(TMRD_BASE + 0x4)
#define TMRD0_CNTR		(unsigned int *)(TMRD_BASE + 0x5)
#define TMRD0_CTRL		(unsigned int *)(TMRD_BASE + 0x6)
#define TMRD0_SCR		(unsigned int *)(TMRD_BASE + 0x7)

#define TMRD1_CMP1		(unsigned int *)(TMRD_BASE + 0x8)
#define TMRD1_CMP2		(unsigned int *)(TMRD_BASE + 0x9)
#define TMRD1_CAP		(unsigned int *)(TMRD_BASE + 0xa)
#define TMRD1_LOAD		(unsigned int *)(TMRD_BASE + 0xb)
#define TMRD1_HOLD		(unsigned int *)(TMRD_BASE + 0xc)
#define TMRD1_CNTR		(unsigned int *)(TMRD_BASE + 0xd)
#define TMRD1_CTRL		(unsigned int *)(TMRD_BASE + 0xe)
#define TMRD1_SCR		(unsigned int *)(TMRD_BASE + 0xf)

#define TMRD2_CMP1		(unsigned int *)(TMRD_BASE + 0x10)
#define TMRD2_CMP2		(unsigned int *)(TMRD_BASE + 0x11)
#define TMRD2_CAP		(unsigned int *)(TMRD_BASE + 0x12)
#define TMRD2_LOAD		(unsigned int *)(TMRD_BASE + 0x13)
#define TMRD2_HOLD		(unsigned int *)(TMRD_BASE + 0x14)
#define TMRD2_CNTR		(unsigned int *)(TMRD_BASE + 0x15)
#define TMRD2_CTRL		(unsigned int *)(TMRD_BASE + 0x16)
#define TMRD2_SCR		(unsigned int *)(TMRD_BASE + 0x17)

#define TMRD3_CMP1		(unsigned int *)(TMRD_BASE + 0x18)
#define TMRD3_CMP2		(unsigned int *)(TMRD_BASE + 0x19)
#define TMRD3_CAP		(unsigned int *)(TMRD_BASE + 0x1a)
#define TMRD3_LOAD		(unsigned int *)(TMRD_BASE + 0x1b)
#define TMRD3_HOLD		(unsigned int *)(TMRD_BASE + 0x1c)
#define TMRD3_CNTR		(unsigned int *)(TMRD_BASE + 0x1d)
#define TMRD3_CTRL		(unsigned int *)(TMRD_BASE + 0x1e)
#define TMRD3_SCR		(unsigned int *)(TMRD_BASE + 0x1f)


/* Controller Area Network (CAN) */
#define CAN_BASE	0x1180

#define CANCTL0			(unsigned int *)(CAN_BASE + 0x0)
#define CANCTL1			(unsigned int *)(CAN_BASE + 0x1)
#define CANBTR0			(unsigned int *)(CAN_BASE + 0x2)
#define CANBR1			(unsigned int *)(CAN_BASE + 0x3)
#define CANRFLG			(unsigned int *)(CAN_BASE + 0x4)
#define CANRIER			(unsigned int *)(CAN_BASE + 0x5)
#define CANTFLG			(unsigned int *)(CAN_BASE + 0x6)