pmc.c

[拉普兰德]TSL1401线性CCD模块资料包

        
    /* Now execute the stop instruction to go into VLLS2 */
    stop();
}
/********************************************************************/
/* VLLS1 mode entry routine. Puts the processor into VLLS1 mode from
 * normal run mode or VLPR. 
 *
 * Mode transitions:
 * RUN -> VLLS1
 * VLPR -> VLLS1
 *
 * NOTE: VLLSx modes will always exit to RUN mode even if you were 
 * in VLPR mode before entering VLLSx.
 *
 * Wakeup from VLLSx mode is controlled by the LLWU module. Most
 * modules cannot issue a wakeup interrupt in VLLSx mode, so make
 * sure to setup the desired wakeup sources in the LLWU before 
 * calling this function.
 *
 * Parameters:
 * none  
 */
void enter_vlls1(void)
{
    /* Write to PMPROT to allow all possible power modes */
    MC_PMPROT = MC_PMPROT_AVLLS1_MASK;
        
    /* Set the LPLLSM field to 0b111 for VLLS1 mode  */
    MC_PMCTRL =  MC_PMCTRL_LPLLSM(7);           // set LPLLSM = 0b111
    disable_ports();    
        
    /* Now execute the stop instruction to go into VLLS1 */
    stop();
}
/********************************************************************/
/* Enable low power wake up on interrupt. This function can be used
 * to set the LPWUI bit. When this bit is set VLPx modes will exit
 * to normal run mode. When this bit is cleared VLPx modes will exit
 * to VLPR mode.
 *
 * The disable_lpwui() function can be used to clear the LPWUI bit.
 *
 * Parameters:
 * none
 */

   

void enable_lpwui(void)
{
    MC_PMCTRL |= MC_PMCTRL_LPWUI_MASK;
}
/********************************************************************/
/* Disable low power wake up on interrupt. This function can be used
 * to clear the LPWUI bit. When this bit is set VLPx modes will exit
 * to normal run mode. When this bit is cleared VLPx modes will exit
 * to VLPR mode.
 *
 * The enable_lpwui() function can be used to set the LPWUI bit.
 *
 * Parameters:
 * none
 */
void disable_lpwui(void)
{
    MC_PMCTRL &= ~MC_PMCTRL_LPWUI_MASK;
}
/********************************************************************/
   /* entry mode variable is set to one of the valid settings following
    000 Normal stop
    001 Reserved
    010 Very low power stop (VLPS)
    011 Low leakage stop (LLS)
    100 Reserved
    101 Very low leakage stop 3 (VLLS3)
    110 Very low leakage stop 2 (VLLS2)
    111 Very low leakage stop 1 (VLLS1)
   */
/********************************************************************/
void enter_stop_mode(char mode)
{
    printf("\n-------------------------------------\n");
    printf("  MC_Enter Low Power Modes Utility    \n");
    printf("--------------------------------------\n");
    
    MC_PMPROT = 0x37;               //This value enables all possible power modes.
 
    MC_PMCTRL = MC_PMCTRL_LPWUI_MASK | MC_PMCTRL_LPLLSM(mode) ;  
    stop();         
}

void     disable_ports(void){
#if (defined(LPLD_K60))
   PORTE_PCR26 = PORT_PCR_IRQC(00);;
   PORTA_PCR19 = PORT_PCR_IRQC(00);
   #endif
  
#if (defined(TWR_K40X256))
   //  SW6 and SW7
     PORTC_PCR5  = PORT_PCR_IRQC(00);
     PORTC_PCR13  = PORT_PCR_IRQC(00);
#endif
     
   // disable trace clock output
     PORTA_PCR6 = ( PORT_PCR_MUX(0x0));
   // disable JTAG i/o PTA0-3 5
     PORTA_PCR0 = ( PORT_PCR_MUX(0x0));
     PORTA_PCR1 = ( PORT_PCR_MUX(0x0));
     PORTA_PCR2 = ( PORT_PCR_MUX(0x0));
     PORTA_PCR3 = ( PORT_PCR_MUX(0x0));
     PORTA_PCR5 = ( PORT_PCR_MUX(0x0));

   // disable fb_clk output
     PORTC_PCR3 = ( PORT_PCR_MUX(0x0));
 	/* Disable the pins for the selected UART */
     if (TERM_PORT == UART0_BASE_PTR)
         {
            /* Disable the UART0_TXD function on PTD6 */
            PORTD_PCR6 = PORT_PCR_MUX(0x0); // UART is alt3 function for this pin

            /* Disable the UART0_RXD function on PTD7 */
            PORTD_PCR7 = PORT_PCR_MUX(0x0); // UART is alt3 function for this pin
         }

     if (TERM_PORT == UART1_BASE_PTR)
  	 {
                 /* Disable the UART1_TXD function on PTC4 */
  		PORTC_PCR4 = PORT_PCR_MUX(0x0); // UART is alt3 function for this pin

  		/* Enable the UART1_RXD function on PTC3 */
  		PORTC_PCR3 = PORT_PCR_MUX(0x0); // UART is alt3 function for this pin
  	}

    if (TERM_PORT == UART2_BASE_PTR)
  	{
                 /* Disable the UART2_TXD function on PTD3 */
  		PORTD_PCR3 = PORT_PCR_MUX(0x0); // UART is alt3 function for this pin

  		/* Disable the UART2_RXD function on PTD2 */
  		PORTD_PCR2 = PORT_PCR_MUX(0x0); // UART is alt3 function for this pin
  	}

    if (TERM_PORT == UART3_BASE_PTR)
  	{
                 /* Disable the UART3_TXD function on PTC17 */
  		PORTC_PCR17 = PORT_PCR_MUX(0x0); // UART is alt3 function for this pin

  		/* Enable the UART3_RXD function on PTC16 */
  		PORTC_PCR16 = PORT_PCR_MUX(0x0); // UART is alt3 function for this pin
  	}
    if (TERM_PORT == UART4_BASE_PTR)
  	{
                 /* Disable the UART3_TXD function on PTC17 */
  		PORTE_PCR24 = PORT_PCR_MUX(0x0); // UART is alt3 function for this pin

  		/* Disable the UART3_RXD function on PTC16 */
  		PORTE_PCR25 = PORT_PCR_MUX(0x0); // UART is alt3 function for this pin
  	}
    if (TERM_PORT == UART5_BASE_PTR)
  	{
                 /* Disable the UART3_TXD function on PTC17 */
  		PORTE_PCR8 = PORT_PCR_MUX(0x0); // UART is alt3 function for this pin

  		/* Disable the UART3_RXD function on PTC16 */
  		PORTE_PCR9 = PORT_PCR_MUX(0x0); // UART is alt3 function for this pin
  	}
  // disable clock gating
  SIM_SCGC1 = 0;
  SIM_SCGC2 = 0;
  SIM_SCGC3 = 0;
  SIM_SCGC4 = 0;
  SIM_SCGC5 = 0;
  SIM_SCGC6 = 0;
  SIM_SCGC7 = 0;

}

//AJJ
void     disable_ports_partial(void){
/*
#if (defined(LPLD_K60))
   PORTE_PCR26 = PORT_PCR_IRQC(00);;
   PORTA_PCR19 = PORT_PCR_IRQC(00);
   #endif
  
#if (defined(TWR_K40X256))
   //  SW6 and SW7
     PORTC_PCR5  = PORT_PCR_IRQC(00);
     PORTC_PCR13  = PORT_PCR_IRQC(00);
#endif
*/    
   // disable trace clock output
     PORTA_PCR6 = ( PORT_PCR_MUX(0x0));
   // disable JTAG i/o PTA0-3 5
     PORTA_PCR0 = ( PORT_PCR_MUX(0x0));
     PORTA_PCR1 = ( PORT_PCR_MUX(0x0));
     PORTA_PCR2 = ( PORT_PCR_MUX(0x0));
     PORTA_PCR3 = ( PORT_PCR_MUX(0x0));
     PORTA_PCR5 = ( PORT_PCR_MUX(0x0));
/*
   // disable fb_clk output
     PORTC_PCR3 = ( PORT_PCR_MUX(0x0));
 	// Disable the pins for the selected UART 
     if (TERM_PORT == UART0_BASE_PTR)
         {
            // Disable the UART0_TXD function on PTD6 
            PORTD_PCR6 = PORT_PCR_MUX(0x0); // UART is alt3 function for this pin

            // Disable the UART0_RXD function on PTD7 
            PORTD_PCR7 = PORT_PCR_MUX(0x0); // UART is alt3 function for this pin
         }

     if (TERM_PORT == UART1_BASE_PTR)
  	 {
                 // Disable the UART1_TXD function on PTC4 
  		PORTC_PCR4 = PORT_PCR_MUX(0x0); // UART is alt3 function for this pin

  		// Enable the UART1_RXD function on PTC3 
  		PORTC_PCR3 = PORT_PCR_MUX(0x0); // UART is alt3 function for this pin
  	}

    if (TERM_PORT == UART2_BASE_PTR)
  	{
                 // Disable the UART2_TXD function on PTD3 
  		PORTD_PCR3 = PORT_PCR_MUX(0x0); // UART is alt3 function for this pin

  		// Disable the UART2_RXD function on PTD2 
  		PORTD_PCR2 = PORT_PCR_MUX(0x0); // UART is alt3 function for this pin
  	}

    if (TERM_PORT == UART3_BASE_PTR)
  	{
                 // Disable the UART3_TXD function on PTC17 
  		PORTC_PCR17 = PORT_PCR_MUX(0x0); // UART is alt3 function for this pin

  		// Enable the UART3_RXD function on PTC16 
  		PORTC_PCR16 = PORT_PCR_MUX(0x0); // UART is alt3 function for this pin
  	}
    if (TERM_PORT == UART4_BASE_PTR)
  	{
                 // Disable the UART3_TXD function on PTC17 
  		PORTE_PCR24 = PORT_PCR_MUX(0x0); // UART is alt3 function for this pin

  		// Disable the UART3_RXD function on PTC16 
  		PORTE_PCR25 = PORT_PCR_MUX(0x0); // UART is alt3 function for this pin
  	}
    if (TERM_PORT == UART5_BASE_PTR)
  	{
                 // Disable the UART3_TXD function on PTC17 
  		PORTE_PCR8 = PORT_PCR_MUX(0x0); // UART is alt3 function for this pin

  		// Disable the UART3_RXD function on PTC16 
  		PORTE_PCR9 = PORT_PCR_MUX(0x0); // UART is alt3 function for this pin
  	}
*/

     // disable clock gating
  //SIM_SCGC1 = 0;  //uart 4 & 5
  //SIM_SCGC2 = 0;  //DAC 0 & 1, ENET
//  SIM_SCGC3 = 0;  //ADC1(27), FTM2(24), SDHC(17), SPI2(12), FLEXCAN1(4), RNGB(0)

//  printf("SIM_SCGC4 is %08x \n\r\n", SIM_SCGC4);
//  printf("SIM_SCGC4 is %08x \n\r\n", SIM_SCGC4);

  SIM_SCGC4 = SIM_SCGC4 & 0x70102030;  //LLWU(28), VREF(20), CMP(19), USBOTG(18), UART3 - 0(13-10), 
                  //I2C1(7), I2C0(6), CMT(2), EWM(1)   VREF defaults to 1
//  printf("SIM_SCGC4 is %08x \n\r\n", SIM_SCGC4);
//  while(!(UART3_S1&UART_S1_TC_MASK));  //make sure uart buffer is empty before exiting


  //SIM_SCGC5 = 0;  //PortE - A(13-9), TSI(5), REGFILE(1), LPTIMER(0)
  //SIM_SCGC6 = 0;  //RTC(29), ADC0(27), FTM1(25), FTM0(24), PIT(23), PDB(22), USBDCD(21), CRC(18), 
                  //I2S(15), SPI1(13), DSPI0(12), FLEXCAN0(4), DMAMUX(1), FTFL(0)
  SIM_SCGC7 = 0x00000000;  //MPU(2), DMA(1), FLEXBUS(0)


}

void outSRS(void){                         //[outSRS]
  if (MC_SRSH & MC_SRSH_SW_MASK)
		printf("[outSRS]Software Reset\n");
	if (MC_SRSH & MC_SRSH_LOCKUP_MASK)
		printf("[outSRS]Core Lockup Event Reset\n");
	if (MC_SRSH & MC_SRSH_JTAG_MASK)
		printf("[outSRS]JTAG Reset\n");
	
	if (MC_SRSL & MC_SRSL_POR_MASK)
		printf("[outSRS]Power-on Reset\n");
	if (MC_SRSL & MC_SRSL_PIN_MASK){
	    // find out which mode we are wakeing up from
          printf("External Pin Reset\n");
	}
	if (MC_SRSL & MC_SRSL_WAKEUP_MASK){
	     printf("[outSRS]Pin Reset wakeup from low power modes\n");
       //The state of PMCTRL[LPLLSM] prior to clearing due to update 
       // of PMPROT indicates which power mode was exited and should be 
       // used by initialization software for proper power mode recovery.
          if ((MC_PMCTRL & MC_PMCTRL_LPLLSM_MASK) == 0)
             printf("[outSRS]Pin Reset wakeup from Normal Stop\n");
	        if ((MC_PMCTRL & MC_PMCTRL_LPLLSM_MASK) == 2)
		         printf("[outSRS]Pin Reset wakeup from Very Low Power Stop(VLPS)\n");
		      if ((MC_PMCTRL & MC_PMCTRL_LPLLSM_MASK) == 3)
		         printf("[outSRS]Pin Reset wakeup from Low Leakage Stop (LLS)\n");
		      if ((MC_PMCTRL & MC_PMCTRL_LPLLSM_MASK) == 5 )
		         printf("[outSRS]Pin Reset wakeup from Very low leakage stop (VLLS3)\n");
		      if ((MC_PMCTRL & MC_PMCTRL_LPLLSM_MASK) == 6)
		         printf("[outSRS]Pin Reset wakeup from Very low leakage stop (VLLS2)\n");
		      if ((MC_PMCTRL & MC_PMCTRL_LPLLSM_MASK) == 7)		       
		         printf("Pin Reset wakeup from Very low leakage stop 1(VLLS1)\n");
          printf("[outSRS]MC PMPROT= %#02X \r\n",   (MC_PMPROT)  );
          printf("[outSRS]MC PMCTRL= %#02X \r\n\n", (MC_PMCTRL) ) ;
	}
	if (MC_SRSL & MC_SRSL_COP_MASK)
	 	printf("[outSRS]Watchdog(COP) Reset\n");
  if (MC_SRSL & MC_SRSL_LOC_MASK)
		printf("[outSRS]Loss of Clock Reset\n");
	if (MC_SRSL & MC_SRSL_LVD_MASK)
	  printf("[outSRS]Low-voltage Detect Reset\n");
  if (MC_SRSL & MC_SRSL_WAKEUP_MASK)
		printf("[outSRS]LLWU Reset\n");	
}