func.c

CCS中通过DM642对AIC23B音频编解码芯片的配置,采用AIC23B主模式,IIC数据传输方式

/*********************************************************************************
* func.C	v1.00            
* Designed by:	Sue
*********************************************************************************/ 
#include <csl.h>
#include <csl_pll.h>
#include "InitFunc.h"

PLL_Init PllInit = {
	11,		// mdiv, PLLM				PLLclkout = 50Mhz*(11+1) = 600Mhz 
	0,		// d0ratio, PLL_PLLDIV0		clkin = 50Mhz;   PLLclkin = 50Mhz/(0+1) = 50Mhz
	
	0,		// d1ratio, PLL_PLLDIV1		PLLEN = (1 or 0), SYSCLK1 = (PLLclkout or clkin)/(0+1) = 600Mhz or 50Mhz;  
	1,		// d2ratio, PLL_PLLDIV2		PLLEN = (1 or 0), SYSCLK2 = (PLLclkout or clkin)/(1+1) = 300Mhz or 25Mhz
	0,		// d3ratio, PLL_PLLDIV3		PLLEN = (1 or 0), SYSCLK3 = (PLLclkout or clkin)/(0+1) = 600Mhz or 50Mhz

	4		// od1ratio, PLL_OSCDIV1	CLKOUT3 = clkin/(4+1) = 10Mhz
};


/*Local software delay function*/
static void PLLDelay(int Count)
{
    volatile int i = Count;
    while(i--);
}

/* Spin in a delay loop for delay iterations */
void SEEDDM642_wait(Uint32 delay)
{
    volatile Uint32 i, n;
    
    n = 0;
    for (i = 0; i < delay; i++)
    {
        n = n + 1;
    }
}

/* Spin in a delay loop for delay microseconds */
void SEEDDM642_waitusec(Uint32 delay)
{
    SEEDDM642_wait(delay * 1000);
}


/********************************************************************************\
\*CLK_init()	-Initialize DM642 board.
\*Parameters: NO.
\*		
\*Return:No.
\********************************************************************************/

void CLK_Init(void)
{	
	PLL_bypass();	// 旁路，不走PLL
	PLLDelay(20);
	
	/* Reset PLL */
	PLL_reset();	// PLLRST = 1
	PLLDelay(20);

	/* Init PLL */
	PLL_init (&PllInit);	
    PLLDelay(20);
    
    /* Take PLL out of reset */
    PLL_deassert();	// PLLRST = 0
    PLLDelay(1500);
    
    /* Enalbe PLL */
    PLL_enable();	// OD1EN = 1
    PLLDelay(20);  
    
     	
}