dspmmu_tlb.c

Omap5910的Dsp和arm内存共享程序。实现双核的内存共享通信机制。

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#include "DSPMMU.h"
#include <stdio.h>

void MMU_WriteTlbEntry(TLB_ENTRY entry, short EntryNumber);
void MMU_Reset();
void MMU_ReleaseReset();
void MMU_Enable();
void MMU_Disable();
short MMU_CheckError();
short MMU_ReadFaultType();
int MMU_ReadFaultAddress();
TLB_ENTRY MMU_ReadTlbEntry(short EntryNumber);
void MMU_DisplayTlbEntry(short entryNumber);



void MMU_WriteTlbEntry(TLB_ENTRY entry, short EntryNumber)
{ 

      unsigned int VirtualTag;
      unsigned short CamHighReg;
      unsigned short CamLowReg;
      unsigned short RamHighReg;
      unsigned short RamLowReg;
      
      	
  		// The 14 MSB of the 24-bit DSP virtual address form the virtual tag
  		VirtualTag = ((entry.VirtualAddress >> 10) & 0x3FFF);
  		
  		
  		// Calculate CAM register content
  		
  		// The 2 MSB go into the 2 LSB of CAM_H_REG
  		CamHighReg= ((VirtualTag >> 12) & 0x3);  		
  		
  		// The 12 LSB go into the 12 MSB of CAM_L_REG */
  		CamLowReg = ((VirtualTag & 0xFFF)<<4);
  		
  		// Entry is valid and shall be preserved 
  		CamLowReg |= VALID | PRESERVED;
  		
  		// Select entry type
  		CamLowReg = CamLowReg | entry.Type;
  
  		// Calculate RAM registers content 
  		
  		// The 16 MSB of the physical address go into RAM_H_REG 
  		RamHighReg = entry.PhysicalAddress >> 16;
  		
  		// The next 6 significant bits go into RAM_L_REG
		RamLowReg = entry.PhysicalAddress & 0xFC00;
		
		// Bits 9 and 8 of RAM_L_REG are access permission bits
		RamLowReg = RamLowReg | entry.AccessPermission;
		
		/* Write to MMU */
		/* Step 1 - Write CAM_H_REG */
		CAM_H_REG = CamHighReg;
		
		/* Step 2 - Write CAM_L_REG */
		CAM_L_REG = CamLowReg;
		
		/* Step 3 - Write RAM_H_REG */
		RAM_H_REG = RamHighReg;
		
		/* Step 4 - Write RAM_L_REG */
		RAM_L_REG = RamLowReg;
		
     	/* Step 5 - Update current entry and protected entry pointers */
        LOCK_REG = ((EntryNumber << 4) | (EntryNumber << 10));
       
        /* Step 6 - Set LD_TLB_REG to write TLB */
		 LD_TLB_REG = WRITE;
       	 
}

TLB_ENTRY MMU_ReadTlbEntry(short EntryNumber)
{
 TLB_ENTRY entry;

 // Clear victim pointer (Bits 9..4 of LOCK_REG)
 LOCK_REG &=0xFC0F;

// Set victim pointer to the entry that shall be read
 LOCK_REG |= EntryNumber << 4;

// Set LD_TLB_REG to read TLB entry
 LD_TLB_REG = READ;

// Extract entry parameters 
 entry.VirtualAddress 	=  (READ_CAM_H_REG & 0x3) << 22;
 entry.VirtualAddress 	+= (READ_CAM_L_REG & 0xFFF0) << 6;
 entry.PhysicalAddress 	=  READ_RAM_H_REG << 16;
 entry.PhysicalAddress 	+= READ_RAM_L_REG & 0xFC00;
 entry.Type 			=  READ_CAM_L_REG & 0x3;
 entry.AccessPermission =  READ_RAM_L_REG & 0x300;
 
 return entry;
}  


void MMU_DisplayTlbEntry(short entryNumber)
{
 TLB_ENTRY entry;
 entry=MMU_ReadTlbEntry(entryNumber);
 printf("Entry %d : Virtual Address = 0x%x, Physical Address = 0x%x \n", entryNumber, entry.VirtualAddress, entry.PhysicalAddress);
}

short MMU_CheckError()
{
 short i;
 int addr;

 i = MMU_ReadFaultType();
 if (i!=0)
 {
	if (i & 0x1)
 	 printf("Translation Fault! \n");
	if (i & 0x2)
	 printf("TLB Miss! \n");
	if (i & 0x4)
	 printf("Permission Fault! \n");
	if (i & 0x8)
	 printf("Error during prefetch! \n");	
    addr = MMU_ReadFaultAddress();
	 printf("Fault address : 0x%x (Byte) / 0x%x (Word) \n", addr, addr>>1);
 }	
 return i;
}

void MMU_Reset()
{
   	// Reset DSP MMU to default parameters
	CNTL_REG = RESET;
}

void MMU_ReleaseReset()
{
   	// Release MMU from Reset
 	CNTL_REG = REL_RESET;
}

void MMU_Enable()
{
 // Enable MMU
 CNTL_REG |= ENABLE;
}

void MMU_Disable()
{
 CNTL_REG &= DISABLE;
}

short MMU_ReadFaultType()
{
 return F_ST_REG;
}

int MMU_ReadFaultAddress()
{
 int i;
 i = FAULT_AD_H_REG << 16;
 i += FAULT_AD_L_REG;
 return i;
}