dspmmu_table.c

Omap5910的Dsp和arm内存共享程序。实现双核的内存共享通信机制。

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#include "DSPMMU_Table.h"
#include <stdio.h>


void MMU_Reset();
void MMU_ReleaseReset();
void MMU_Enable();
void MMU_Disable();
short MMU_ReadFaultType();
int MMU_ReadFaultAddress();
short MMU_CheckError();

#pragma DATA_ALIGN(Level1Table, 256)
int Level1Table[16];

void Init_DSPMMU_Table( void )
{ 

      unsigned int PhysicalAddress;         
      unsigned int TableEntry;
      int i;
      
      // Build Translation Table
      // Map 16MB DSP External Address Space to Physical Address Space starting at 0x1000:0000
      for(i=0;i<16;i++)
      {
	       // We map theDSP memory space contiguously into SDRAM starting at 0x1000:0000
		   // We map 16 sections, each 1MB (0x0010:0000) in size 
	       PhysicalAddress = 0x10000000+i*0x00100000;
	       
	       
	       // Bits 31..20 are the 12 upper Bits of the Section Start Address
	       TableEntry =  PhysicalAddress & 0xFFF00000;
	       
	       // Bits 11 and 10 are Access Permission Bits	   
	       // No access = 0, Read only = 2, Read and write = 3
		   // For test purposes, even virtual addresses will be read / write, odd ones read only
	       if((i%2)==1)
	        TableEntry += SECTION_READ_ONLY;
           else
            TableEntry += SECTION_READ_WRITE;

		   // Bits 1 and 0 define the first-level table entry type
	       // Coarse page table pointer = 1, Section translation = 2, Fine page table pointer = 3	       
	       TableEntry += SECTION;
	       Level1Table[i] = TableEntry;
      }       
      
      // Position Tanslation Table via TTB Registers
	  // The upper 16 Bit go into TTB_H_REG
	  TTB_H_REG = ((int) &Level1Table) >> 16;
	  // Bits 15..7 go into TTB_L_REG (Bits 6...0 should always be zero)
	  TTB_L_REG = ((int) &Level1Table) & 0xFF80;
	  
	  // Configure MMU for Translation Table usage 
      CNTL_REG |= USE_TABLE;       	 
}

short MMU_CheckError()
{
 short i;
 int addr;

 i = MMU_ReadFaultType();
 if (i!=0)
 {
	if (i & 0x1)
 	 printf("Translation Fault! \n");
	if (i & 0x2)
	 printf("TLB Miss! \n");
	if (i & 0x4)
	 printf("Permission Fault! \n");
	if (i & 0x8)
	 printf("Error during prefetch! \n");	
    addr = MMU_ReadFaultAddress();
	 printf("Fault address : 0x%x (Byte) / 0x%x (Word) \n", addr, addr>>1);
 }	
 return i;
}

void MMU_Reset()
{
   	// Reset DSP MMU to default parameters
	CNTL_REG = RESET;
}

void MMU_ReleaseReset()
{
   	// Release MMU from Reset
 	CNTL_REG = REL_RESET;
}

void MMU_Enable()
{
 // Enable MMU
 CNTL_REG |= ENABLE;
}

void MMU_Disable()
{
 CNTL_REG &= DISABLE;
}

short MMU_ReadFaultType()
{
 return F_ST_REG;
}

int MMU_ReadFaultAddress()
{
 int i;
 i = FAULT_AD_H_REG << 16;
 i += FAULT_AD_L_REG;
 return i;
}