📄 device.c
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/**************************************************************/
/* Device.c */
/* */
/* Functions used for DSK */
/* */
/* By delphifx 2007/05/10 */
/* */
/**************************************************************/
#include "Device.h"
extern char Receive_[10];
extern int Dst_[Fsk_Len];
extern int *Dst_far;
/**************************************test**************************************/
/* daughter borad Led test */
/**************************************test**************************************/
void Led_test(void)
{
int i;
for(i=0;i<500000;i++)
{
*(short int *)(0xB0040000) = 0x000;
}
for(i=0;i<500000;i++)
{
*(int *)(0xB0040000) = 0xFFFFFFFF;
*(int *)(0xB004000C) = 0xFFFFFFFF;
*(int *)(0xB0040010) = 0xFFFFFFFF;
}
}
/***********************************submit_qdma**********************************/
/* Submit a QDMA request to transfer the data. */
/********************************************************************************/
void submit_qdma(int *MEM_SRC,int *MEM_DST,int EL_COUNT,int flag)
{
EDMA_Config config;
if (flag==1) flag_Receive=1;
else flag_Receive=0;
config.opt = EDMA_OPT_RMK( EDMA_OPT_PRI_HIGH,
EDMA_OPT_ESIZE_32BIT,
EDMA_OPT_2DS_NO,
EDMA_OPT_SUM_IDX,
EDMA_OPT_2DD_NO,
EDMA_OPT_DUM_INC,
EDMA_OPT_TCINT_YES,
EDMA_OPT_TCC_OF(TCCINTNUM),
EDMA_OPT_LINK_NO,
EDMA_OPT_FS_NO);
config.src = (Uint32)MEM_SRC; /* Buffer to transfer */
config.cnt = (Uint32)EL_COUNT; /* element count to transfer */
config.dst = (Uint32)MEM_DST; /* Where to transfer */
config.idx = (Uint32)0x04; /* 0x00000004 */
EDMA_qdmaConfig(&config);
wait();
} /* end submit_qdma */
/**************************************wait**************************************/
/* Wait until the transfer completes, as indicated by the status of the low- */
/* priority queue in the queue status register (QSR). */
/********************************************************************************/
void wait(void)
{
Uint32 flg;
//printf("QDMA transfering...");
do{
flg = EDMA_getPriQStatus();
flg = flg & (1 << EDMA_OPT_PRI_HIGH);
// printf("...");
}while(!flg);
//QDMA结束;
//printf("\nQDMA finished!\n");
// while (!(EDMA_getPriQStatus() & EDMA_OPT_PRI_HIGH));
} /* end wait */
/**************************************Init**************************************/
/* DSP_init */
/**************************************Init**************************************/
void System_init(void)
{
/* DSP initialization */
CSR=0x100; /* Disable all interrupts */
IER=1; /* Disable all interrupts except NMI */
ICR=0xffff; /* Clear all pending interrupts */
*(unsigned volatile int *)EMIF_GCR = 0x3778;
*(unsigned volatile int *)EMIF_CE0 = 0x30; /* EMIF CE1 control, 32bit */
*(unsigned volatile int *)EMIF_CE1 = CE1_8; /* EMIF CE1 control, 32bit */
*(unsigned volatile int *)EMIF_CE2 = 0x30; /* EMIF CE1 control, 32bit */
*(unsigned volatile int *)EMIF_CE3 = CE1_32; /* EMIF CE1 control, 32bit */
*(unsigned volatile int *)EMIF_SDCTRL = 0x07126000; /* EMIF SDRAM control */
*(unsigned volatile int *)EMIF_SDRP = 0x61a; /* EMIF SDRM refresh period */
*(unsigned volatile int *)EMIF_SDEXT= 0x54529; /* EMIF SDRM extension */
/* Configure L2 for 64K Cache and enable caching of external memory*/
CSL_init();
CACHE_enableCaching(CACHE_CE03);
CACHE_setL2Mode(CACHE_64KCACHE);
setupInterrupts();
/* Enable the related interrupts */
IRQ_enable(IRQ_EVT_EDMAINT);
EDMA_intDisable(TCCINTNUM);
EDMA_intClear(TCCINTNUM);
EDMA_intEnable(TCCINTNUM);
/* for(i=0;i<5;i++)
{
*(short int *)(0xB0040000) = 0x000;
}
for(i=0;i<5;i++)
{
*(short int *)(0xB0040000) = 0x001;
}
for(i=0;i<5;i++)
{
*(short int *)(0xB0040000) = 0x000;
}
for(i=0;i<5;i++)
{
*(short int *)(0xB0040000) = 0xFFFFFFFF;
*(short int *)(0xB004000C) = 0xFFFFFFFF;
*(short int *)(0xB0040010) = 0xFFFFFFFF;
}
*/
}
void delay()
{
int i;
for(i=0;i<0xfff;i++){}
return;
}
/************************************************************************\
name: SetInterruptsEdma
purpose: Sets up interrupts to service EDMA transfers
inputs: void
returns: void
\************************************************************************/
void setupInterrupts(void)
{
IRQ_setVecs(vectors); /* point to the IRQ vector table */
IRQ_nmiEnable();
IRQ_globalEnable();
IRQ_map(IRQ_EVT_EDMAINT, 8);
IRQ_reset(IRQ_EVT_EDMAINT);
} /* End of SetInterruptsEdma() */
/************************************************************************\
name: Interrupt Service Routine c_int08
When Finish the EDMA,this interrupt ocur
\************************************************************************/
interrupt void
c_int08(void)
{
static char *Receive_next=Receive_;
//IER = 0;
//IRQ_clear(IRQ_EVT_EDMAINT);
EDMA_intClear(TCCINTNUM);
//submit_qdma();
//*(short int *)(0x90080000) = w;
// wait();
//if (flag_Receive)
{
printf("Here is %dth byte data.\n",Receive_next-Receive_);
Dcode(Dst_far,Data_Get,Fsk_Len);
Dcode_To_byte(Data_Get,Receive_next++,Fsk_Len);
}
//IRQ_enable(IRQ_EVT_EDMAINT);
//CACHE_wbInvL2(Receive_Buffer,Fsk_Len, CACHE_WAIT);
//Dcode(Receive_Buffer,Data_Get,Fsk_Len);
//Dcode_To_byte(Data_Get,Receive_,1);
//printf("One Finish");
return;
}
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