switches.asm

Eversmith_-_AVRSMS for pdu mode

;==========================================================
; This is a part of: Eversmith - AVRSMS
; Copyright (2003) Martin Thomas, Kaiserslautern,  Germany. 
; This  Software is  distributed  under  the Aladdin  Free 
; Public License (AFPL) Read the file license.txt included 
; in the distibution-package. See main-file for more infor-
; mation and license.
;==========================================================

; Output Switch handling (Relais, LEDs etc.)

; Output-Pins handled by this routines
; as bit-mask (0b00000001=only Pin0 is controlled by this;
; (0b11000011=Pins 7,6,1,0 are controlled by this routines)
; here only the 7 lower bits are controlled (e.g. 7 Relais
; ULN 2003) -> control all but PIN7:
.equ SWMASK=0b01111111
; Output Switches are connected to PORTC 
; (** turn off JTAG fuse on ATmega16/xx to use all pins of PORTC 
;  as normal inputs/outputs **)
.equ SWPORT=PORTC
.equ SWDDR=DDRC

.cseg

;==================================================
; SwitchInit - Initialize Switches
; outputs are active LOW
; (Controller "sinks" current, e.g. for ULN2803, 
; which has invert logic - never tried one)
SwitchInit:
	push r16
	; enable all controlled outputs (=off in inverse logic)
	in r16,SWPORT	; load old output-state
	ori r16,SWMASK	; ori with mask, controlled bits now set
	out SWPORT,r16	; set output
	; set direction
	in	r16,SWDDR	; load old direction
	ori r16,SWMASK	; or with mask, controled bits now set
	out SWDDR,r16	; set direction
	nop				; sync
	pop r16
ret
	
;==================================================
; SwitchOn
; 
; Input: 
;	r16 - Mask, for all bits set in mask, bits in 
;		PORT will be cleared (=turned on in neg. logic)
;
; P    1010 1100	; old port
; I    0110 1010	; input
; MI   0000 1010	; mask controlled (by AND mask)
; CI   1111 0101	; invert result
; PaCI 1010 0100	; result=old port AND CI
SwitchOn:
	push r16
	push r17
	
	andi r16,SWMASK		; mask all uncontrolled bits
	com r16				; invert 
	in r17,SWPORT		; load actual PORT-state
	and r17,r16			
	out SWPORT,r17
	nop					; sync

	pop r17
	pop r16
ret
	

;==================================================
; SwitchOff
; 
; Input: 
;	r16 - Mask, for all bits set in mask, bits in 
;		PORT will be set (=turned off in inverse logic)
;
; P    1010 1100	; old port
; I    0110 1010	; input
; MI   0000 1010	; mask controlled (by AND mask)
; PoMI 1010 1110	; result=old port or MI
SwitchOff:
	push r16
	push r17
	
	andi r16,SWMASK		; mask all uncontrolled bits
	in r17,SWPORT		; load actual PORT-state
	or r17,r16			
	out SWPORT,r17
	nop					; sync

	pop r17
	pop r16
ret