📄 eeprom.c
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// ---- main programs--- //
#include "Mb90540.h"
#include "SPI.def"
__far IO_BYTE *eeprom_add1;
unsigned int eeprom_ram[128],eep_rx_count;
unsigned int yc_len,yc_zuh,yx_len,yx_zuh,yk_len,rc1,tc1,txc;
unsigned int eeprom_add,eeprom_wrlen,eeprom_rdlen;
unsigned char bwlen,WEflag,txbuf,rxbuf,uart1_rc,uart1_rtime;
unsigned char status;
unsigned char check_LPC1,check_LPC2;
unsigned char uart1_rxbw[150],uart1_txbw[150];
IO_BYTE eep_in_count,eep_out_count;
unsigned char right_bw[11]={0xD7,0x09,0x1C,0x04,0x00,0x00,0x00,0x55,0x93,0x55};
unsigned char error_bw[11]={0xD7,0x09,0x1D,0x04,0x00,0x00,0x00,0x55,0x92,0x56};
// ******* Prototyps ******* //
void initSIO2(void);
void start_seq(void);
void stop_seq(void);
void read_status(void);
void write_disable(void);
void wr_eeprom(void);
void rd_eeprom(void);
void read_eeprom(void);
void write_eeprom(void);
void initUart1(void);
void uart1_rxcl(void);
void uart1_rxcheck(void);
void uart1_txcheck(void);
void rxbw_ok(void);
void rxbw_no(void);
// ****** Procedures ******* //
void initUart1(void)
{
DDR4_D43 = 0;
DDR4_D45 = 1;
SMR1 = 0x01;
SCR1 = 0x17;
SSR1 = 0x0e;
U1CDCR = 0x8e;
uart1_rc = rc1 = 0x00;
uart1_rtime = 0x00;
bwlen = 0;
}
void initSIO2(void)
{
SMCS = 0x1207; // (00010010xxxx0111) //
SCDCR = 0x8C; // (10001100) //
DDR7_D70 = 1;
DDR7_D72 = 1;
CS = 1;
WP = 1;
write_disable(); // disable write //
}
void eep_init (void)
{
eep_in_count=eep_out_count=0;
eep_mark=0;
eep_rx_count=0;
run_mark_a1=0;
/* CS = 0;
SDR = WREN;
start_seq();
stop_seq();
CS = 1;
__wait_nop();
__wait_nop();
CS = 0;
SDR=WRSR;
start_seq();
SDR=0x30;
start_seq();
stop_seq();
CS=1;*/
}
void start_seq(void)
{ // start a synchron transfer //
SMCS_STOP = 0;
SMCS_STRT = 1;
while(SMCS_BUSY == 1); // wait until transmit is complete //
}
void stop_seq(void)
{
SMCS_STOP = 1;
SMCS_STRT = 0;
SMCS_BUSY = 0;
}
void read_status(void)
{ // reads status out of the EEPROM //
CS = 0; // chipselect (CS) is active low //
SDR = RDSR; // write opcode into serial shift data register //
start_seq(); // start synchron transfer //
SDR = DUMMY; // write dummy into serial shift data register //
start_seq(); // start synchron transfer //
status = SDR; // receive status of the EEPROM //
stop_seq(); // clear flags //
CS = 1; // CS high //
}
void write_disable(void)
{
CS = 0;
SDR = WRDI;
start_seq();
stop_seq();
CS = 1;
}
void rd_eeprom(void)
{ // read data out of the memory //
unsigned int i;
CS = 0;
SDR = READ; // write opcode into serial shift data register //
start_seq(); // start synchron transfer //
SDR = 0; // send memory address //
start_seq();
SDR = 0;
start_seq();
// for (j=0;j<256;j++)
// {
for (i=0;i<8192;i++)
{
SDR = DUMMY;
start_seq();
systemconfig_para(i)=SDR;
// *eeprom_add1++=SDR;
// stop_seq();
}
// stop_seq();
// }
stop_seq();
CS=1;
}
void read_eeprom(void)
{
eeprom_add = 0x0000;
eeprom_add1=(__far IO_BYTE*)&systemconfig_para(0);
rd_eeprom();
run_mark_a1=1;
}
void wr_eeprom(void)
{
IO_BYTE n;
// write_disable(); // disable write //
CS = 0;
SDR = WREN;
start_seq();
CS = 1;
__wait_nop();
__wait_nop();
CS = 0;
SDR = WRITE;
start_seq();
SDR = eeprom_add>>8;
start_seq();
SDR = eeprom_add;
start_seq();
eeprom_add+=32;
for(n=0;n<32;n++)
{
SDR = *eeprom_add1++;
start_seq();
// stop_seq();
}
stop_seq();
CS=1;
}
void write_eeprom(void)
{
if (eep_in_count!=eep_out_count)
{
read_status();
if (status&1) return;
if (eep_mark_a0==1)
{
if (eeprom_wrlen==0)
{
eep_mark_a0=0;
eep_out_count+=2;
}
else
{
wr_eeprom();
eeprom_wrlen--;
}
}
else
{
eeprom_add=eeprom_ram[eep_out_count];
eeprom_add1=(__far IO_BYTE*)eeprom_add+0x100000;
eeprom_add&=0x1fe0;
eeprom_wrlen=eeprom_ram[eep_out_count+1];
eep_mark_a0=1;
wr_eeprom();
eeprom_wrlen--;
}
}
}
void uart1_rxcl(void)
{
IO_BYTE j,i;
if ( uart1_rc != 0 )
{
if ( uart1_rtime > 6 )
{
if ((uart1_rxbw[0]==0xD7)&&(uart1_rxbw[1]==0x09))
{
if (rc1==(uart1_rxbw[3]+6))
{
bwlen = uart1_rc - 2;
check_LPC1 = check_LPC2 = 0;
uart1_rxcheck();
if ((check_LPC1==uart1_rxbw[bwlen])&&(check_LPC2==uart1_rxbw[bwlen+1]))
{
switch(uart1_rxbw[2])
{
// 下装系统配置参数
/* case 0x01:{
for(j=0;j<7;j++) systemconfig_para(j) = uart1_rxbw[j+8];
eeprom_ram[eep_in_count++]=(unsigned int)&systemconfig_para(0);
eeprom_ram[eep_in_count++]=0x1;
rxbw_ok();
break;
}*/
// 下装遥控发码参数
case 0x07:{
i=uart1_rxbw[3]-4;
j=0;
while (i!=0)
{
yk_fm_para(eep_rx_count++)=uart1_rxbw[j+8];
i--;
j++;
}
if (uart1_rxbw[7]==0x55)
{
eeprom_ram[eep_in_count++]=(unsigned int)&yk_fm_para(0);
eeprom_ram[eep_in_count++]=(eep_rx_count+31)/32;
eep_rx_count=0;
}
rxbw_ok();
break;
}
// 下装串口参数
case 0x06:{
eeprom_wrlen = 18;
switch(uart1_rxbw[5])
{
case 0x00:{
for(j=0;j<18;j++) com0_para(j) = uart1_rxbw[j+8];
eeprom_ram[eep_in_count++]=(unsigned int)&com0_para(0);
eeprom_ram[eep_in_count++]=0x1;
break;
}
case 0x01:{
for(j=0;j<18;j++) com1_para(j) = uart1_rxbw[j+8];
eeprom_ram[eep_in_count++]=(unsigned int)&com1_para(0);
eeprom_ram[eep_in_count++]=0x1;
break;
}
case 0x02:{
for(j=0;j<18;j++) com2_para(j) = uart1_rxbw[j+8];
eeprom_ram[eep_in_count++]=(unsigned int)&com2_para(0);
eeprom_ram[eep_in_count++]=0x1;
break;
}
}
rxbw_ok();
break;
}
// 下装遥测发码数据
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