📄 main.lss
字号:
main.elf: file format elf32-avr
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 0000024e 00000000 00000000 00000094 2**0
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .data 00000000 00800060 0000024e 000002e2 2**0
CONTENTS, ALLOC, LOAD, DATA
2 .bss 00000001 00800060 00800060 000002e2 2**0
ALLOC
3 .noinit 00000000 00800061 00800061 000002e2 2**0
CONTENTS
4 .eeprom 00000000 00810000 00810000 000002e2 2**0
CONTENTS
5 .stab 000008d0 00000000 00000000 000002e4 2**2
CONTENTS, READONLY, DEBUGGING
6 .stabstr 00000815 00000000 00000000 00000bb4 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
00000000 <__vectors>:
0: 12 c0 rjmp .+36 ; 0x26
2: 2b c0 rjmp .+86 ; 0x5a
4: 2a c0 rjmp .+84 ; 0x5a
6: 29 c0 rjmp .+82 ; 0x5a
8: 28 c0 rjmp .+80 ; 0x5a
a: 27 c0 rjmp .+78 ; 0x5a
c: 26 c0 rjmp .+76 ; 0x5a
e: 25 c0 rjmp .+74 ; 0x5a
10: 24 c0 rjmp .+72 ; 0x5a
12: 23 c0 rjmp .+70 ; 0x5a
14: 22 c0 rjmp .+68 ; 0x5a
16: 21 c0 rjmp .+66 ; 0x5a
18: 20 c0 rjmp .+64 ; 0x5a
1a: 1f c0 rjmp .+62 ; 0x5a
1c: 1e c0 rjmp .+60 ; 0x5a
1e: 1d c0 rjmp .+58 ; 0x5a
20: 1c c0 rjmp .+56 ; 0x5a
22: 1b c0 rjmp .+54 ; 0x5a
24: 1a c0 rjmp .+52 ; 0x5a
00000026 <__ctors_end>:
26: 11 24 eor r1, r1
28: 1f be out 0x3f, r1 ; 63
2a: cf e5 ldi r28, 0x5F ; 95
2c: d4 e0 ldi r29, 0x04 ; 4
2e: de bf out 0x3e, r29 ; 62
30: cd bf out 0x3d, r28 ; 61
00000032 <__do_copy_data>:
32: 10 e0 ldi r17, 0x00 ; 0
34: a0 e6 ldi r26, 0x60 ; 96
36: b0 e0 ldi r27, 0x00 ; 0
38: ee e4 ldi r30, 0x4E ; 78
3a: f2 e0 ldi r31, 0x02 ; 2
3c: 02 c0 rjmp .+4 ; 0x42
0000003e <.do_copy_data_loop>:
3e: 05 90 lpm r0, Z+
40: 0d 92 st X+, r0
00000042 <.do_copy_data_start>:
42: a0 36 cpi r26, 0x60 ; 96
44: b1 07 cpc r27, r17
46: d9 f7 brne .-10 ; 0x3e
00000048 <__do_clear_bss>:
48: 10 e0 ldi r17, 0x00 ; 0
4a: a0 e6 ldi r26, 0x60 ; 96
4c: b0 e0 ldi r27, 0x00 ; 0
4e: 01 c0 rjmp .+2 ; 0x52
00000050 <.do_clear_bss_loop>:
50: 1d 92 st X+, r1
00000052 <.do_clear_bss_start>:
52: a1 36 cpi r26, 0x61 ; 97
54: b1 07 cpc r27, r17
56: e1 f7 brne .-8 ; 0x50
58: ec c0 rjmp .+472 ; 0x232
0000005a <__bad_interrupt>:
5a: d2 cf rjmp .-92 ; 0x0
0000005c <delay>:
#define DD_SS 2
#define DDR_SPI DDRB
uint8_t RevData;
void delay(volatile uint16_t time)
{
5c: cf 93 push r28
5e: df 93 push r29
60: cd b7 in r28, 0x3d ; 61
62: de b7 in r29, 0x3e ; 62
64: 26 97 sbiw r28, 0x06 ; 6
66: 0f b6 in r0, 0x3f ; 63
68: f8 94 cli
6a: de bf out 0x3e, r29 ; 62
6c: 0f be out 0x3f, r0 ; 63
6e: cd bf out 0x3d, r28 ; 61
70: 89 83 std Y+1, r24 ; 0x01
72: 9a 83 std Y+2, r25 ; 0x02
volatile uint16_t i,j;
for( i=0;i<time;i++)
74: 1b 82 std Y+3, r1 ; 0x03
76: 1c 82 std Y+4, r1 ; 0x04
78: 2b 81 ldd r18, Y+3 ; 0x03
7a: 3c 81 ldd r19, Y+4 ; 0x04
7c: 89 81 ldd r24, Y+1 ; 0x01
7e: 9a 81 ldd r25, Y+2 ; 0x02
80: 28 17 cp r18, r24
82: 39 07 cpc r19, r25
84: d8 f4 brcc .+54 ; 0xbc
for( j=0;j<10;j++);
86: 1d 82 std Y+5, r1 ; 0x05
88: 1e 82 std Y+6, r1 ; 0x06
8a: 8d 81 ldd r24, Y+5 ; 0x05
8c: 9e 81 ldd r25, Y+6 ; 0x06
8e: 0a 97 sbiw r24, 0x0a ; 10
90: 48 f4 brcc .+18 ; 0xa4
92: 8d 81 ldd r24, Y+5 ; 0x05
94: 9e 81 ldd r25, Y+6 ; 0x06
96: 01 96 adiw r24, 0x01 ; 1
98: 8d 83 std Y+5, r24 ; 0x05
9a: 9e 83 std Y+6, r25 ; 0x06
9c: 8d 81 ldd r24, Y+5 ; 0x05
9e: 9e 81 ldd r25, Y+6 ; 0x06
a0: 0a 97 sbiw r24, 0x0a ; 10
a2: b8 f3 brcs .-18 ; 0x92
a4: 8b 81 ldd r24, Y+3 ; 0x03
a6: 9c 81 ldd r25, Y+4 ; 0x04
a8: 01 96 adiw r24, 0x01 ; 1
aa: 8b 83 std Y+3, r24 ; 0x03
ac: 9c 83 std Y+4, r25 ; 0x04
ae: 2b 81 ldd r18, Y+3 ; 0x03
b0: 3c 81 ldd r19, Y+4 ; 0x04
b2: 89 81 ldd r24, Y+1 ; 0x01
b4: 9a 81 ldd r25, Y+2 ; 0x02
b6: 28 17 cp r18, r24
b8: 39 07 cpc r19, r25
ba: 28 f3 brcs .-54 ; 0x86
}
bc: 26 96 adiw r28, 0x06 ; 6
be: 0f b6 in r0, 0x3f ; 63
c0: f8 94 cli
c2: de bf out 0x3e, r29 ; 62
c4: 0f be out 0x3f, r0 ; 63
c6: cd bf out 0x3d, r28 ; 61
c8: df 91 pop r29
ca: cf 91 pop r28
cc: 08 95 ret
000000ce <SPI_SlaveInit>:
void SPI_SlaveInit(void)
{
/* 设置MISO为输出，其他为输入 */
DDR_SPI = (1<<DD_MISO);
ce: 80 e1 ldi r24, 0x10 ; 16
d0: 87 bb out 0x17, r24 ; 23
//DDR_SPI &= ~(1<<DD_MOSI);
//DDR_SPI &= ~(1<<DD_SS);
/* 使能 SPI */
SPCR = (1<<SPE)|(1<<CPHA)|(1<<SPIE);
d2: 84 ec ldi r24, 0xC4 ; 196
d4: 8d b9 out 0x0d, r24 ; 13
//SPCR |= (1<<CPHA);
//SPCR|=1<<SPIE;//开中断
SREG=0x80;
d6: 80 e8 ldi r24, 0x80 ; 128
d8: 8f bf out 0x3f, r24 ; 63
}
da: 08 95 ret
000000dc <SPI_SlaveReceive>:
char SPI_SlaveReceive(void)
{
/* 等待接收结束 */
while(!(SPSR & (1<<SPIF)));
dc: 77 9b sbis 0x0e, 7 ; 14
de: fe cf rjmp .-4 ; 0xdc
/* 返回数据 */
return SPDR;
e0: 8f b1 in r24, 0x0f ; 15
e2: 99 27 eor r25, r25
}
e4: 08 95 ret
000000e6 <ISR>:
ISR(SPI_STC_vect)
{
RevData=SPDR;
e6: 8f b1 in r24, 0x0f ; 15
e8: 80 93 60 00 sts 0x0060, r24
}
ec: 08 95 ret
000000ee <KeySan>:
uint8_t KeySan(void)
{
ee: cf 93 push r28
uint8_t temp;
uint8_t KeyValue=0xff;
f0: cf ef ldi r28, 0xFF ; 255
PORTD=0xe0;
f2: 80 ee ldi r24, 0xE0 ; 224
f4: 82 bb out 0x12, r24 ; 18
delay(1);
f6: 81 e0 ldi r24, 0x01 ; 1
f8: 90 e0 ldi r25, 0x00 ; 0
fa: b0 df rcall .-160 ; 0x5c
temp=PINC;
fc: 83 b3 in r24, 0x13 ; 19
temp=~temp;
fe: 80 95 com r24
if((temp&0x1f)!=0)
100: 99 27 eor r25, r25
102: 8f 71 andi r24, 0x1F ; 31
104: 90 70 andi r25, 0x00 ; 0
106: 00 97 sbiw r24, 0x00 ; 0
108: d9 f0 breq .+54 ; 0x140
{
switch(temp&0x1f)
10a: 84 30 cpi r24, 0x04 ; 4
10c: 91 05 cpc r25, r1
10e: 99 f0 breq .+38 ; 0x136
110: 85 30 cpi r24, 0x05 ; 5
112: 91 05 cpc r25, r1
114: 34 f4 brge .+12 ; 0x122
116: 81 30 cpi r24, 0x01 ; 1
118: 91 05 cpc r25, r1
11a: 49 f0 breq .+18 ; 0x12e
11c: 02 97 sbiw r24, 0x02 ; 2
11e: 49 f0 breq .+18 ; 0x132
120: 0f c0 rjmp .+30 ; 0x140
122: 88 30 cpi r24, 0x08 ; 8
124: 91 05 cpc r25, r1
126: 49 f0 breq .+18 ; 0x13a
128: 40 97 sbiw r24, 0x10 ; 16
12a: 49 f0 breq .+18 ; 0x13e
12c: 09 c0 rjmp .+18 ; 0x140
{
case 0x01:
KeyValue=1;
12e: c1 e0 ldi r28, 0x01 ; 1
break;
130: 07 c0 rjmp .+14 ; 0x140
case 0x02:
KeyValue=2;
132: c2 e0 ldi r28, 0x02 ; 2
break;
134: 05 c0 rjmp .+10 ; 0x140
case 0x04:
KeyValue= 3;
136: c3 e0 ldi r28, 0x03 ; 3
break;
138: 03 c0 rjmp .+6 ; 0x140
case 0x08:
KeyValue= 4;
13a: c4 e0 ldi r28, 0x04 ; 4
break;
13c: 01 c0 rjmp .+2 ; 0x140
case 0x10:
KeyValue= 5;
13e: c5 e0 ldi r28, 0x05 ; 5
break;
}
}
PORTD=0xd0;
140: 80 ed ldi r24, 0xD0 ; 208
142: 82 bb out 0x12, r24 ; 18
delay(1);
144: 81 e0 ldi r24, 0x01 ; 1
146: 90 e0 ldi r25, 0x00 ; 0
148: 89 df rcall .-238 ; 0x5c
temp=PINC;
14a: 83 b3 in r24, 0x13 ; 19
temp=~temp;
14c: 80 95 com r24
if((temp&0x1f)!=0)
14e: 99 27 eor r25, r25
150: 8f 71 andi r24, 0x1F ; 31
152: 90 70 andi r25, 0x00 ; 0
154: 00 97 sbiw r24, 0x00 ; 0
156: d9 f0 breq .+54 ; 0x18e
{
switch(temp&0x1f)
158: 84 30 cpi r24, 0x04 ; 4
15a: 91 05 cpc r25, r1
15c: 99 f0 breq .+38 ; 0x184
15e: 85 30 cpi r24, 0x05 ; 5
160: 91 05 cpc r25, r1
162: 34 f4 brge .+12 ; 0x170
164: 81 30 cpi r24, 0x01 ; 1
166: 91 05 cpc r25, r1
168: 49 f0 breq .+18 ; 0x17c
16a: 02 97 sbiw r24, 0x02 ; 2
16c: 49 f0 breq .+18 ; 0x180
16e: 0f c0 rjmp .+30 ; 0x18e
170: 88 30 cpi r24, 0x08 ; 8
172: 91 05 cpc r25, r1
174: 49 f0 breq .+18 ; 0x188
176: 40 97 sbiw r24, 0x10 ; 16
178: 49 f0 breq .+18 ; 0x18c
17a: 09 c0 rjmp .+18 ; 0x18e
{
case 0x01:
KeyValue=6;
17c: c6 e0 ldi r28, 0x06 ; 6
break;
17e: 07 c0 rjmp .+14 ; 0x18e
case 0x02:
KeyValue=7;
180: c7 e0 ldi r28, 0x07 ; 7
break;
182: 05 c0 rjmp .+10 ; 0x18e
case 0x04:
KeyValue= 8;
184: c8 e0 ldi r28, 0x08 ; 8
break;
186: 03 c0 rjmp .+6 ; 0x18e
case 0x08:
KeyValue= 9;
188: c9 e0 ldi r28, 0x09 ; 9
break;
18a: 01 c0 rjmp .+2 ; 0x18e
case 0x10:
KeyValue= 10;
18c: ca e0 ldi r28, 0x0A ; 10
break;
}
}
PORTD=0xb0;
18e: 80 eb ldi r24, 0xB0 ; 176
190: 82 bb out 0x12, r24 ; 18
delay(1);
192: 81 e0 ldi r24, 0x01 ; 1
194: 90 e0 ldi r25, 0x00 ; 0
196: 62 df rcall .-316 ; 0x5c
temp=PINC;
198: 83 b3 in r24, 0x13 ; 19
temp=~temp;
19a: 80 95 com r24
if((temp&0x1f)!=0)
19c: 99 27 eor r25, r25
19e: 8f 71 andi r24, 0x1F ; 31
1a0: 90 70 andi r25, 0x00 ; 0
1a2: 00 97 sbiw r24, 0x00 ; 0
1a4: d9 f0 breq .+54 ; 0x1dc
{
switch(temp&0x1f)
1a6: 84 30 cpi r24, 0x04 ; 4
1a8: 91 05 cpc r25, r1
1aa: 99 f0 breq .+38 ; 0x1d2
1ac: 85 30 cpi r24, 0x05 ; 5
1ae: 91 05 cpc r25, r1
1b0: 34 f4 brge .+12 ; 0x1be
1b2: 81 30 cpi r24, 0x01 ; 1
1b4: 91 05 cpc r25, r1
1b6: 49 f0 breq .+18 ; 0x1ca
1b8: 02 97 sbiw r24, 0x02 ; 2
1ba: 49 f0 breq .+18 ; 0x1ce
1bc: 0f c0 rjmp .+30 ; 0x1dc
1be: 88 30 cpi r24, 0x08 ; 8
1c0: 91 05 cpc r25, r1
1c2: 49 f0 breq .+18 ; 0x1d6
1c4: 40 97 sbiw r24, 0x10 ; 16
1c6: 49 f0 breq .+18 ; 0x1da
1c8: 09 c0 rjmp .+18 ; 0x1dc
{
case 0x01:
KeyValue=11;
1ca: cb e0 ldi r28, 0x0B ; 11
break;
1cc: 07 c0 rjmp .+14 ; 0x1dc
case 0x02:
KeyValue=12;
1ce: cc e0 ldi r28, 0x0C ; 12
break;
1d0: 05 c0 rjmp .+10 ; 0x1dc
case 0x04:
KeyValue= 13;
1d2: cd e0 ldi r28, 0x0D ; 13
break;
1d4: 03 c0 rjmp .+6 ; 0x1dc
case 0x08:
KeyValue= 14;
1d6: ce e0 ldi r28, 0x0E ; 14
break;
1d8: 01 c0 rjmp .+2 ; 0x1dc
case 0x10:
KeyValue= 15;
1da: cf e0 ldi r28, 0x0F ; 15
break;
}
}
PORTD=0x70;
1dc: 80 e7 ldi r24, 0x70 ; 112
1de: 82 bb out 0x12, r24 ; 18
delay(1);
1e0: 81 e0 ldi r24, 0x01 ; 1
1e2: 90 e0 ldi r25, 0x00 ; 0
1e4: 3b df rcall .-394 ; 0x5c
temp=PINC;
1e6: 83 b3 in r24, 0x13 ; 19
temp=~temp;
1e8: 80 95 com r24
if((temp&0x1f)!=0)
1ea: 99 27 eor r25, r25
1ec: 8f 71 andi r24, 0x1F ; 31
1ee: 90 70 andi r25, 0x00 ; 0
1f0: 00 97 sbiw r24, 0x00 ; 0
1f2: d9 f0 breq .+54 ; 0x22a
{
switch(temp&0x1f)
1f4: 84 30 cpi r24, 0x04 ; 4
1f6: 91 05 cpc r25, r1
1f8: 99 f0 breq .+38 ; 0x220
1fa: 85 30 cpi r24, 0x05 ; 5
1fc: 91 05 cpc r25, r1
1fe: 34 f4 brge .+12 ; 0x20c
200: 81 30 cpi r24, 0x01 ; 1
202: 91 05 cpc r25, r1
204: 49 f0 breq .+18 ; 0x218
206: 02 97 sbiw r24, 0x02 ; 2
208: 49 f0 breq .+18 ; 0x21c
20a: 0f c0 rjmp .+30 ; 0x22a
20c: 88 30 cpi r24, 0x08 ; 8
20e: 91 05 cpc r25, r1
210: 49 f0 breq .+18 ; 0x224
212: 40 97 sbiw r24, 0x10 ; 16
214: 49 f0 breq .+18 ; 0x228
216: 09 c0 rjmp .+18 ; 0x22a
{
case 0x01:
KeyValue=16;
218: c0 e1 ldi r28, 0x10 ; 16
break;
21a: 07 c0 rjmp .+14 ; 0x22a
case 0x02:
KeyValue=17;
21c: c1 e1 ldi r28, 0x11 ; 17
break;
21e: 05 c0 rjmp .+10 ; 0x22a
case 0x04:
KeyValue= 18;
220: c2 e1 ldi r28, 0x12 ; 18
break;
222: 03 c0 rjmp .+6 ; 0x22a
case 0x08:
KeyValue= 19;
224: c3 e1 ldi r28, 0x13 ; 19
break;
226: 01 c0 rjmp .+2 ; 0x22a
case 0x10:
KeyValue= 20;
228: c4 e1 ldi r28, 0x14 ; 20
break;
}
}
return(KeyValue);
22a: 8c 2f mov r24, r28
22c: 99 27 eor r25, r25
}
22e: cf 91 pop r28
230: 08 95 ret
00000232 <main>:
/****************************************
主程序
****************************************/
int main(void)
{
232: cf e5 ldi r28, 0x5F ; 95
234: d4 e0 ldi r29, 0x04 ; 4
236: de bf out 0x3e, r29 ; 62
238: cd bf out 0x3d, r28 ; 61
uint8_t tKeyValue;
DDRB|=0x02;
23a: b9 9a sbi 0x17, 1 ; 23
SPI_SlaveInit();
23c: 48 df rcall .-368 ; 0xce
DDRD=0xf0;//D4,D5,D6,D7为扫描线
23e: 80 ef ldi r24, 0xF0 ; 240
240: 81 bb out 0x11, r24 ; 17
DDRC=0x00;//C0-C4为输入线
242: 14 ba out 0x14, r1 ; 20
while(1)
{
tKeyValue=KeySan();
244: 54 df rcall .-344 ; 0xee
if(tKeyValue!=0xff)
246: 8f 3f cpi r24, 0xFF ; 255
248: e9 f3 breq .-6 ; 0x244
SPDR=tKeyValue;
24a: 8f b9 out 0x0f, r24 ; 15
24c: fb cf rjmp .-10 ; 0x244
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