ax88796_8c-source.html

国外牛人公开的ＡＶＲ代码

00236     ax88796Write(PAR0+0, AX88796_MAC0);
00237     ax88796Write(PAR0+1, AX88796_MAC1);
00238     ax88796Write(PAR0+2, AX88796_MAC2);
00239     ax88796Write(PAR0+3, AX88796_MAC3);
00240     ax88796Write(PAR0+4, AX88796_MAC4);
00241     ax88796Write(PAR0+5, AX88796_MAC5);
00242     <span class="comment">// set start point</span>
00243     ax88796Write(CURR,RXSTART_INIT+1);
00244 
00245     ax88796Write(CR,(RD2|START));
00246     ax88796Write(RCR,RCR_INIT);
00247 
00248     <span class="keywordflow">if</span>(ax88796Read(GPI) &amp; I_SPD)        <span class="comment">// check PHY speed setting</span>
00249         tcrFduFlag = FDU;               <span class="comment">// if 100base, do full duplex</span>
00250     <span class="keywordflow">else</span>
00251         tcrFduFlag = 0;                 <span class="comment">// if 10base, do half duplex</span>
00252         
00253     ax88796Write(TCR,(tcrFduFlag|TCR_INIT));
00254 
00255     ax88796Write(GPOC,MPSEL);           <span class="comment">// select media interface</span>
00256   
00257     ax88796Write(TPSR,TXSTART_INIT);
00258 
00259     ax88796Write(CR,(RD2|STOP));
00260     ax88796Write(DCR,DCR_INIT);
00261     ax88796Write(CR,(RD2|START));
00262     ax88796Write(ISR,0xFF);
00263     ax88796Write(IMR,IMR_INIT);
00264     ax88796Write(TCR,(tcrFduFlag|TCR_INIT));
00265 
00266     <span class="comment">//test</span>
00267 <span class="comment">/*</span>
00268 <span class="comment">    while(1)</span>
00269 <span class="comment">    {</span>
00270 <span class="comment">        vt100SetCursorPos(18,0);</span>
00271 <span class="comment">        ax88796RegDump();</span>
00272 <span class="comment">    }</span>
00273 <span class="comment">*/</span>
00274 }
00275 
00276 
00277 <span class="keywordtype">void</span> ax88796BeginPacketSend(<span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> packetLength)
00278 {
00279     <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> sendPacketLength;
00280     sendPacketLength = (packetLength&gt;=ETHERNET_MIN_PACKET_LENGTH)?
00281                         (packetLength):(ETHERNET_MIN_PACKET_LENGTH);
00282     
00283     <span class="comment">//start the NIC</span>
00284     ax88796Write(CR,(RD2|START));
00285     
00286     <span class="comment">// still transmitting a packet - wait for it to finish</span>
00287     <span class="keywordflow">while</span>( ax88796Read(CR) &amp; TXP );
00288 
00289     <span class="comment">//load beginning page for transmit buffer</span>
00290     ax88796Write(TPSR,TXSTART_INIT);
00291     
00292     <span class="comment">//set start address for remote DMA operation</span>
00293     ax88796Write(RSAR0,0x00);
00294     ax88796Write(RSAR1,0x40);
00295     
00296     <span class="comment">//clear the packet stored interrupt</span>
00297     ax88796Write(ISR, PTX);
00298 
00299     <span class="comment">//load data byte count for remote DMA</span>
00300     ax88796Write(RBCR0, (<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span>)(packetLength));
00301     ax88796Write(RBCR1, (<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span>)(packetLength&gt;&gt;8));
00302 
00303     ax88796Write(TBCR0, (<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span>)(sendPacketLength));
00304     ax88796Write(TBCR1, (<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span>)((sendPacketLength)&gt;&gt;8));
00305     
00306     <span class="comment">//do remote write operation</span>
00307     ax88796Write(CR,0x12);
00308 }
00309 
00310 
00311 <span class="keywordtype">void</span> ax88796SendPacketData(<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> * localBuffer, <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> length)
00312 {
00313     <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> i;
00314     
00315     <span class="keywordflow">for</span>(i=0;i&lt;length;i++)
00316         ax88796Write(RDMAPORT, localBuffer[i]);
00317 }
00318 
00319 
00320 <span class="keywordtype">void</span> ax88796EndPacketSend(<span class="keywordtype">void</span>)
00321 {
00322     <span class="comment">//send the contents of the transmit buffer onto the network</span>
00323     ax88796Write(CR,(RD2|TXP));
00324     
00325     <span class="comment">// clear the remote DMA interrupt</span>
00326     ax88796Write(ISR, RDC);
00327 }
00328 
00329 
00330 <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> ax88796BeginPacketRetreive(<span class="keywordtype">void</span>)
00331 {
00332     <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> writePagePtr;
00333     <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> readPagePtr;
00334     <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> bnryPagePtr;
00335     <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> i;
00336     
00337     <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> pageheader[4];
00338     <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> rxlen;
00339     
00340     <span class="comment">// check for and handle an overflow</span>
00341     ax88796ProcessInterrupt();
00342     
00343     <span class="comment">// read CURR from page 1</span>
00344     ax88796Write(CR,(PS0|RD2|START));
00345     writePagePtr = ax88796Read(CURR);
00346     <span class="comment">// read the boundary register from page 0</span>
00347     ax88796Write(CR,(RD2|START));
00348     bnryPagePtr = ax88796Read(BNRY);
00349 
00350     <span class="comment">// first packet is at page bnryPtr+1</span>
00351     readPagePtr = bnryPagePtr+1;
00352     <span class="keywordflow">if</span>(readPagePtr &gt;= RXSTOP_INIT) readPagePtr = RXSTART_INIT;
00353     
00354     <span class="comment">// return if there is no packet in the buffer</span>
00355     <span class="keywordflow">if</span>( readPagePtr == writePagePtr )
00356     {
00357         <span class="keywordflow">return</span> 0;
00358     }
00359     
00360     <span class="comment">// clear the packet received interrupt flag</span>
00361     ax88796Write(ISR, PRX);
00362     
00363     <span class="comment">// if the boundary pointer is invalid,</span>
00364     <span class="comment">// reset the contents of the buffer and exit</span>
00365     <span class="keywordflow">if</span>( (bnryPagePtr &lt; RXSTART_INIT) || (bnryPagePtr &gt;= RXSTOP_INIT) )
00366     {
00367         ax88796Write(BNRY, RXSTART_INIT);
00368         ax88796Write(CR, (PS0|RD2|START));
00369         ax88796Write(CURR, RXSTART_INIT+1);
00370         ax88796Write(CR, (RD2|START));
00371         
00372 <span class="comment">//      rprintf("B");</span>
00373         <span class="keywordflow">return</span> 0;
00374     }
00375 
00376     <span class="comment">// initiate DMA to transfer the RTL8019 packet header</span>
00377     ax88796Write(RBCR0, 4);
00378     ax88796Write(RBCR1, 0);
00379     ax88796Write(RSAR0, 0);
00380     ax88796Write(RSAR1, readPagePtr);
00381     ax88796Write(CR, (RD0|START));
00382     <span class="keywordflow">for</span>(i=0;i&lt;4;i++)
00383         pageheader[i] = ax88796Read(RDMAPORT);
00384 
00385     <span class="comment">// end the DMA operation</span>
00386     ax88796Write(CR, (RD2|START));
00387     <span class="keywordflow">for</span>(i = 0; i &lt;= 20; i++)
00388         <span class="keywordflow">if</span>(ax88796Read(ISR) &amp; RDC)
00389             <span class="keywordflow">break</span>;
00390     ax88796Write(ISR, RDC);
00391     
00392     rxlen = (pageheader[PKTHEADER_PKTLENH]&lt;&lt;8) + pageheader[PKTHEADER_PKTLENL];
00393     NextPage = pageheader[PKTHEADER_NEXTPAGE];
00394     
00395     CurrentRetreiveAddress = (readPagePtr&lt;&lt;8) + 4;
00396     
00397     <span class="comment">// if the NextPage pointer is invalid, the packet is not ready yet - exit</span>
00398     <span class="keywordflow">if</span>( (NextPage &gt;= RXSTOP_INIT) || (NextPage &lt; RXSTART_INIT) )
00399     {
00400 <span class="comment">//      rprintf("N");</span>
00401 <span class="comment">//      rprintfu08(nextPage);</span>
00402         <span class="keywordflow">return</span> 0;
00403     }
00404 
00405     <span class="keywordflow">return</span> rxlen-4;
00406 }
00407 
00408 
00409 <span class="keywordtype">void</span> ax88796RetreivePacketData(<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> * localBuffer, <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> length)
00410 {
00411     <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> i;
00412     
00413     <span class="comment">// initiate DMA to transfer the data</span>
00414     ax88796Write(RBCR0, (<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span>)length);
00415     ax88796Write(RBCR1, (<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span>)(length&gt;&gt;8));
00416     ax88796Write(RSAR0, (<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span>)CurrentRetreiveAddress);
00417     ax88796Write(RSAR1, (<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span>)(CurrentRetreiveAddress&gt;&gt;8));
00418     ax88796Write(CR, (RD0|START));
00419     <span class="keywordflow">for</span>(i=0;i&lt;length;i++)
00420         localBuffer[i] = ax88796Read(RDMAPORT);
00421 
00422     <span class="comment">// end the DMA operation</span>
00423     ax88796Write(CR, (RD2|START));
00424     <span class="keywordflow">for</span>(i = 0; i &lt;= 20; i++)
00425         <span class="keywordflow">if</span>(ax88796Read(ISR) &amp; RDC)
00426             <span class="keywordflow">break</span>;
00427     ax88796Write(ISR, RDC);
00428     
00429     CurrentRetreiveAddress += length;
00430     <span class="keywordflow">if</span>( CurrentRetreiveAddress &gt;= 0x6000 )
00431         CurrentRetreiveAddress -= (0x6000-0x4600) ;
00432 }
00433 
00434 
00435 <span class="keywordtype">void</span> ax88796EndPacketRetreive(<span class="keywordtype">void</span>)
00436 {
00437     <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> i;
00438     <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> bnryPagePtr;
00439 
00440     <span class="comment">// end the DMA operation</span>
00441     ax88796Write(CR, (RD2|START));
00442     <span class="keywordflow">for</span>(i = 0; i &lt;= 20; i++)
00443         <span class="keywordflow">if</span>(ax88796Read(ISR) &amp; RDC)
00444             <span class="keywordflow">break</span>;
00445     ax88796Write(ISR, RDC);
00446 
00447     <span class="comment">// set the boundary register to point</span>
00448     <span class="comment">// to the start of the next packet-1</span>
00449     bnryPagePtr = NextPage-1;
00450     <span class="keywordflow">if</span>(bnryPagePtr &lt; RXSTART_INIT) bnryPagePtr = RXSTOP_INIT-1;
00451 
00452     ax88796Write(BNRY, bnryPagePtr);
00453 }
00454 
00455 
00456 <span class="keywordtype">void</span> ax88796ProcessInterrupt(<span class="keywordtype">void</span>)
00457 {
00458     <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> intr = ax88796Read(ISR);
00459     
00460     <span class="comment">// check for receive overflow</span>
00461     <span class="keywordflow">if</span>( intr &amp; OVW )
00462         ax88796ReceiveOverflowRecover();
00463 }
00464 
00465 
00466 <span class="keywordtype">void</span> ax88796ReceiveOverflowRecover(<span class="keywordtype">void</span>)
00467 {
00468     <span class="comment">// receive buffer overflow handling procedure</span>
00469     <span class="comment">// as specified in the AX88796 datasheet</span>
00470 
00471     <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> cmdReg;
00472     <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> resend=0;
00473 
00474     <span class="comment">// check if we were transmitting something</span>
00475     cmdReg = ax88796Read(CR);
00476     <span class="comment">// stop the interface</span>
00477     ax88796Write(CR, (RD2|STOP));
00478     <span class="comment">// wait for timeout</span>
00479     delay_ms(2);