s3c2510pci.c

VxWorks BSP for S3C2510A

 *
 * LOGIC:
 *  When host is accessed, the address is made to 0xF0110000 based, 
 *  which is dedicated address of S3C2510 PCI host controller.
 * 
 * RETURNS:
 *  PCI Address.
 */


static u32 PCIMakeConfigAddress(u32 bus, u32 device, u32 function, u32 offset)
{
	u32 address=0;

	if(bus == 0)
	{
		if(device != 0)
		{
			address = AHB_ADDR_PCI_CFG0(device, function, offset);
		}
		else
		{
			address = 0xf0110000;
			address |= offset & 0xff;
		}
	}
	else
	{
		address = AHB_ADDR_PCI_CFG1(bus, device, function, offset);
	}
	return address;
}/*** end of PCIMakeConfigAddress() ***/


/*
 * S3C2510_ReadPciConfigHead
 *
 * FUNCTION:
 *  Read the PCI Configuration header. byte, word, long word mode are available.
 *
 * RETURNS:
 *  STATUS OK or ERROR.
 */

static STATUS S3C2510_ReadPciConfigHead (int bus, int dev, int func,
                      int reg, int size, void * pResult)
{
	void* pPciaddr;
	STATUS retval = OK;

	switch (size)
	{
		case 1:			/* read byte */
			pPciaddr = (u8*)PCIMakeConfigAddress(bus, dev, func, reg);
			*(u8*)pResult = *(u8*)pPciaddr;
			break;

		case 2:			/* read word */
			pPciaddr = (u16*)PCIMakeConfigAddress(bus, dev, func, reg);
			*(u16*)pResult = *(u16*)pPciaddr;
			break;

		case 4: 		/* read long word */
			pPciaddr = (u32*)PCIMakeConfigAddress(bus, dev, func, reg);
			*(u32*)pResult = *(u32*)pPciaddr;
			break;

		default:
			retval = ERROR;
			
	}
	return retval;
}/* end of S3C2510_ReadPciConfigHead() */

/*
 * S3C2510_WritePciConfigHead
 *
 * FUNCTION:
 *  Write to the PCI Configuration header. byte, word, long word mode are available.
 *
 *
 * RETURNS:
 *  STATUS OK or ERROR.
 */

static STATUS S3C2510_WritePciConfigHead (int bus, int dev, int func,
                       int reg, int size, UINT32 data)
{
	void* pPciaddr;
	STATUS retval = OK;

	switch (size)
	{
		case 1:			/* write byte */
			pPciaddr = (u8*)PCIMakeConfigAddress(bus, dev, func, reg);
			*(u8*)pPciaddr = (u8)data;
			break;

		case 2:			/* write word */
			pPciaddr = (u16*)PCIMakeConfigAddress(bus, dev, func, reg);
			*(u16*)pPciaddr = (u16)data;
			break;

		case 4: 		/* write long word */
			pPciaddr = (u32*)PCIMakeConfigAddress(bus, dev, func, reg);
			*(u32*)pPciaddr = (u32)data;
			break;

		default:
			retval = ERROR;
			
	}
	return retval;
}/* end of S3C2510_WritePciConfigHead() */


/*
 * S3C2510_InilizePciLib
 *
 * FUNCTION:
 *  Initialize PCI BIOS libraries.
 *
 * RETURNS:
 *  STATUS OK or ERROR.
 * 
 * REFERENCE:
 *  LLD Section 8.1.3
 */
 
static STATUS S3C2510_InilizePciLib(void)
{
	DEBUG(4, ">>\n");

	/* Here, we use PCI_MECHANISM_0. We supply our read and write functions */
	
	if ( pciConfigLibInit (PCI_MECHANISM_0, (u32)S3C2510_ReadPciConfigHead,
					(u32)S3C2510_WritePciConfigHead, (ULONG)NULL) 
                     != OK ) 
	{
		DEBUG(4, "pciConfigLibInit failed.\n");
		return ERROR;
	}

	return OK;
} /* end of S3C2510_InilizePciLib() */


/*
 * S3C2510_PciInterrupt
 *
 * FUNCTION:
 *  Interrupt service routine.
 *
 * RETURNS:
 *  None.
 */

static void S3C2510_PciInterrupt(void)
{
	union{ 
    	u32 nPCIINTST;  
    	s_PCIINTST s;
    } uPCIINTST;
    

	/* interrupt pending bit clear */
	uPCIINTST.nPCIINTST = rPCIINTST;
	rPCIINTST = uPCIINTST.nPCIINTST;

	DEBUG(5, "PCIHSC[x%08x]PCIINTST[0x%08x]\n", (int)rPCIHSC, (int)uPCIINTST.nPCIINTST);
	rPCIHSC |= 0xffff0000;

	/* In normal operating condition, below logs do not needed. */
#ifdef S3C2510PCI_INTERRUPT_LOG
	if(sPCIHSTS.MPE)
		DEBUG(4, "Master Data Parity Error\n");
	if(sPCIHSTS.STA)
		DEBUG(4, "Signaled Target Abort\n");
	if(sPCIHSTS.RTA)
		DEBUG(4, "Received Target Abort\n");
	if(sPCIHSTS.RMA)
		DEBUG(5, "Received Master Abort\n");
	if(sPCIHSTS.SSE)
		DEBUG(4, "Signaled System Error\n");
	if(sPCIHSTS.DPE)
		DEBUG(4, "Detected Parity Error\n");

	/* status bit clear */
	rPCIHSC |= 0xffff0000;

	/* check PCI interrrupt status */
	if(uPCIINTST.s.PRD)
	 	DEBUG(4, "PCI Reset DeAsseerted\n");
	if(uPCIINTST.s.PRA)
		DEBUG(4, "PCI Reset Asserted\n");
	if(uPCIINTST.s.MFE)
		DEBUG(5, "Master Fatal Error, PCIINTAD[0x%lx]\n",rPCIINTAD);
	if(uPCIINTST.s.MPE)
		DEBUG(4, "Master Parity Error, PCIINTAD[0x%lx]\n",rPCIINTAD);
	if(uPCIINTST.s.TPE)
		DEBUG(4, "Target Parity Error\n");
	if(uPCIINTST.s.PME && HostMode())
		DEBUG(4, "PME# Asserted\n");
	if(uPCIINTST.s.SER)
		DEBUG(4, "SERR# Asserted\n");
	if(uPCIINTST.s.INA)
		DEBUG(4, "INTA# Asserted\n");
	if(uPCIINTST.s.DM0)
		DEBUG(4, "PDMA0 Done\n");
	if(uPCIINTST.s.DE0)
		DEBUG(4, "PDMA0 Error\n");
	if(uPCIINTST.s.DM1)
		DEBUG(4, "PDMA1 Done\n");
	if(uPCIINTST.s.DE1)
		DEBUG(4, "PDMA1 Error\n");
	if(uPCIINTST.s.AER)
		DEBUG(4, "AHB Error Response\n");
	if(uPCIINTST.s.RDE)
		DEBUG(5, "Read Error\n");
	if(uPCIINTST.s.WRE)
		DEBUG(5, "Write Error\n");
#endif
}/* end of S3C2510_PciInterrupt() */



/***************************************************************************
 * System input / output libraries.
 * Actually, here in S3C2510 Host driver, we don't use this I/O libraries
 * but we use MECHANISM_0 method.
 * But, we cannot remove these functions because compile convenience. 
 **************************************************************************/

UCHAR sysInByte(ULONG port)
{
	DEBUG(4, ">>\n");
	return 0;
}

USHORT sysInWord (ULONG port)
{
	DEBUG(4, ">>\n");
	return 0;
}

ULONG sysInLong (ULONG port)
{
	DEBUG(4, ">>\n");
	return 0;
}

void sysInWordString (ULONG port, UINT16 *pData, int count)
{
	DEBUG(4, ">>\n");
}

void sysInLongString (ULONG port, ULONG *pData, int count)
{
	DEBUG(4, ">>\n");
}

void sysOutByte (ULONG port, UCHAR data)
{
	DEBUG(4, ">>\n");
}

void sysOutWord	(ULONG port, UINT16 data)
{
	DEBUG(4, ">>\n");
}

void sysOutLong (ULONG port, ULONG data)
{
	DEBUG(4, ">>\n");
}

void sysOutWordString (ULONG port, UINT16 *pData, int count)
{
	DEBUG(4, ">>\n");
}

void sysOutLongString (ULONG port, ULONG *pData, int count)
{
	DEBUG(4, ">>\n");
}

/***************************************************************************
 * End of System input / output libraries.
 **************************************************************************/

/*
 * S3C2510_InitializePciHost
 *
 * FUNCTION:
 *  Main initialization routine for S3C2510 PCI Host controller.
 *
 * RETURNS:
 *  STATUS OK or ERROR.
 * 
 * REFERENCE:
 *  LLD Section 8.1.1
 */

STATUS S3C2510_InitializePciHost ( void )
{
	DEBUG(4, ">>\n");

	/* Check whether S3C2510 is in PCI host mode or not */
	if(IsPciMode())
	{
		if(SMDK2510_PCI_Setup() != OK)
		{
			printf("PCI host setup failed\n");
			return ERROR;
		}
	}
	else
	{
		printf("S3C2510 is not int PCI mode. Exit ...\n");
		return ERROR;
	}


	/* several function calls for initialization for PCI interrupt */


	/* initialize pci interrupt library */
	if(pciIntLibInit() !=OK)
	{
		printf("pciIntLibInit failed.\n");
		return ERROR;
	}

	/* interrupt connection */
	if( intConnect(INT_VEC_PCI_PCCARD, pciInt, 0) != OK)
	{
		printf("main pci interrupt routine registration failed.\n");
		return ERROR;
	}

	if( pciIntConnect(INT_VEC_PCI_PCCARD, S3C2510_PciInterrupt, 0) != OK)
	{
		printf("host interrupt registration failed.\n");
		return ERROR;
	}


    /* Initialize the PCI Bios functions. */
	if(S3C2510_InilizePciLib() != OK)
	{
		printf("PCI config lib initialization failed\n");
		return ERROR;
	}

	/* PCI host initialization */
	S3C2510_SysPciAutoConfig();


#ifdef S3C2510PCI_DEVICESHOW
	/* Display PCI device list */
    pciDeviceShow(0);
#endif

#ifdef S3C2510PCI_PCIHEADSHOW
	/* Display PCI Header */
    pciHeaderShow(0, 0, 0);
#endif

	DEBUG(4, "<<\n");
	return OK;
}/* end of S3C2510_InitializePciHost() */