📄 s3c2510pci_def.h
字号:
* * |-PAST-|---PSST----|--------PSL------|PSHT-| * __ __ __ __ __ __ __ __ __ * HCLK | |__| |__| |__| |__| |__| |__| |__| |__| |__ * _ _______________________________________________ ____ * ADDR _|_______________________________________________|____ * _______ ___________________________________ __________ * REG#,CE# _______|___________________________________|__________ * ___________________ ________________ * OE#WE#IOxx# |_________________| * ___________________ _____________________________ ____ * DATA(MEMW) ___________________|_____________________________|____ * _______ _________________________________________ ____ * DATA(IOW) _______|_________________________________________|____ * _____ * DATA(READ) ---------------------------------_____---------------- * * PAST : Address Setup Time * PSST : Strobe Setup Time * PSL : Strobe Length * PSHT : Strobe Hold Time **************************************************************************/typedef struct /*-.-\\ host */{ unsigned int AST:4; /* 3 - 0 (AST) : Address Setup Time */ unsigned int rs0:4; /* 7 - 4 (rs0)*/ unsigned int SST:4; /* 11 - 8 (SST) : Strobe Setup Time*/ unsigned int rs1:4; /* 15 -12 (rs1)*/ unsigned int SL :6; /* 21 -16 (SL ) : Strobe Length*/ unsigned int rs2:2; /* 23 -22 (rs2)*/ unsigned int SHT:4; /* 27 -24 (SHT) : Strobe Hold Time*/ unsigned int rs3:4; /* 31 -28 (rs3)*/}s_PCCARD16T;/* PDMACON0 (180h) PMDA CH0 Control & Status Register*//* PDMACON1 (1A0h) PMDA CH1 Control & Status Register*/typedef struct { unsigned int RE :1; /* Bit 0 (RE) : Run Enable (PDMARUNn aliased)*/ unsigned int IRP:1; /* Bit 1 (IRP) : Route PDMA Interrupt to PCI*/ unsigned int BSE:1; /* Bit 2 (BSE) : Byte-Swapping Enable*/ unsigned int rs0:1; /* Bit 3 (rs0) : 0*/ unsigned int S :1; /* Bit 4 (S) : Source Selection (1=PCI)*/ unsigned int D :1; /* Bit 5 (D) : Destination Selection (1=PCI)*/ unsigned int SAF:1; /* Bit 6 (SAF) : Source Address Fix*/ unsigned int DAF:1; /* Bit 7 (DAF) : Destination Address Fix*/ unsigned int SCM:4; /* Bit 8 : 0 (read)*/ /* 11 - 9 (SCM) : Source PCI Command*/ unsigned int DCM:4; /* Bit 12 : 1 (write)*/ /* 15 -13 (DCM) : Destination PCI Command*/ unsigned int rs1:13; /* 28 -16 (rs1)*/ unsigned int ERR:1; /* Bit 29 (ERR) : PDMA Done with Error*/ unsigned int PRG:1; /* Bit 30 (PRG) : PDMA programmed from PCI bus*/ unsigned int BSY:1; /* Bit 31 (BS) : PDMA busy*/}s_PDMACON;#define AHB_SIDE 0x0 /* sPDMACONn.S , sPDMACONn.D*/#define PCI_SIDE 0x1 /* sPDMACONn.S , sPDMACONn.D*//******************************************************************* * PDMASRC0 (184h) PDMA CH0 Source Address Register * PDMASRC1 (1A4h) PDMA CH1 Source Address Register * PDMADST0 (188h) PDMA CH0 Destination Address Register * PDMADST1 (1A8h) PDMA CH1 Destination Address Register * PDMACNT0 (18Ch) PDMA CH0 Transfer Byte Count Register * PDMACNT1 (1ACh) PDMA CH1 Transfer Byte Count Register ********************************************************************//*************************************************************************** * Declarations for PCI SFR (SFR Structure Base-Type) **************************************************************************/#define sPCIHID ( *(volatile s_PCIHID *) PCIHID )#define sPCIHSC ( *(volatile s_PCIHSC *) PCIHSC )#define sPCIHCODE ( *(volatile s_PCIHCODE *) PCIHCODE )#define sPCIHLINE ( *(volatile s_PCIHLINE *) PCIHLINE )#define sPCIHBAR0 ( *(volatile s_PCIHMBAR *) PCIHBAR0 )#define sPCIHBAR1 ( *(volatile s_PCIHMBAR *) PCIHBAR1 )#define sPCIHBAR2 ( *(volatile s_PCIHIBAR *) PCIHBAR2 )#define sPCIHCISP ( *(volatile s_PCIHCISP *) PCIHCISP )#define sPCIHSSID ( *(volatile s_PCIHSSID *) PCIHSSID )#define sPCIHCAP ( *(volatile s_PCIHCAP *) PCIHCAP )#define sPCIHLTIT ( *(volatile s_PCIHLTIT *) PCIHLTIT )#define sPCIHTIMER ( *(volatile s_PCIHTIMER *) PCIHTIMER )#define sPCIHPMR0 ( *(volatile s_PCIHPMR0 *) PCIHPMR0 )#define sPCIHPMR1 ( *(volatile s_PCIHPMR1 *) PCIHPMR1 )#define sPCIHCMD ( *(volatile s_PCIHSC_D *) PCIHSC )#define sPCIHSTS ( *(volatile s_PCIHSC_D *) PCIHSC )#define sPCIHHDTYPE ( *(volatile s_PCIHLINE_D *) PCIHLINE )#define sPCIHBIST ( *(volatile s_PCIHLINE_D *) PCIHLINE )#define sPCIHPMC ( *(volatile s_PCIHPMR0_D *) PCIHPMR0 )#define sPCIHPMCSR ( *(volatile s_PCIHPMR1_D *) PCIHPMR1 )#define sPCIHPMBSE ( *(volatile s_PCIHPMR1_D *) PCIHPMR1 )#define sPCICON ( *(volatile s_PCICON *) PCICON )#define sPCISET ( *(volatile s_PCISET *) PCISET )#define sPCIINTEN ( *(volatile s_PCIINTEN *) PCIINTEN )#define sPCIINTST ( *(volatile s_PCIINTST *) PCIINTST )#define sPCIINTAD r32( PCIINTAD )#define sPCIBATAPM ( *(volatile s_PCIBATAPM *) PCIBATAPM )#define sPCIBATAPI ( *(volatile s_PCIBATAPI *) PCIBATAPI )#define sPCIRCC ( *(volatile s_PCIRCC *) PCIRCC )#define sPCIDIAG0 ( *(volatile s_PCIDIAG0 *) PCIDIAG0 )#define sPCIDIAG1 ( *(volatile s_PCIDIAG1 *) PCIDIAG1 )#define sPCIBELAP ( *(volatile s_PCIBEL *) PCIBELAP )#define sPCIBELPA ( *(volatile s_PCIBEL *) PCIBELPA )#define sPCIMAIL0 r32( PCIMAIL0 )#define sPCIMAIL1 r32( PCIMAIL1 )#define sPCIMAIL2 r32( PCIMAIL2 )#define sPCIMAIL3 r32( PCIMAIL3 )#define sPCIBATPA0 ( *(volatile s_PCIBATPA0 *) PCIBATPA0 )#define sPCIBAM0 ( *(volatile s_PCIBAM0 *) PCIBAM0 )#define sPCIBATPA1 ( *(volatile s_PCIBATPA1 *) PCIBATPA1 )#define sPCIBAM1 ( *(volatile s_PCIBAM1 *) PCIBAM1 )#define sPCIBATPA2 ( *(volatile s_PCIBATPA2 *) PCIBATPA2 )#define sPCIBAM2 ( *(volatile s_PCIBAM2 *) PCIBAM2 )#define sPCISWAP ( *(volatile s_PCISWAP *) PCISWAP )#define sPCCARDEVT ( *(volatile s_PCCARDEVT *) PCCARDEVT )#define sPCCARDEVM ( *(volatile s_PCCARDEVM *) PCCARDEVM )#define sPCCARDPRS ( *(volatile s_PCCARDPRS *) PCCARDPRS )#define sPCCARDFEV ( *(volatile s_PCCARDFEV *) PCCARDFEV )#define fPCCARDEVT ( *(volatile f_PCCARDEVT *) PCCARDEVT )#define fPCCARDEVM ( *(volatile f_PCCARDEVM *) PCCARDEVM )#define fPCCARDPRS ( *(volatile f_PCCARDPRS *) PCCARDPRS )#define fPCCARDFEV ( *(volatile f_PCCARDFEV *) PCCARDFEV )#define sPCCARDCON ( *(volatile s_PCCARDCON *) PCCARDCON )#define sPCCARD16C ( *(volatile s_PCCARD16C *) PCCARD16C )#define sPCCARD16M ( *(volatile s_PCCARD16T *) PCCARD16M )#define sPCCARD16I ( *(volatile s_PCCARD16T *) PCCARD16I )#define sPDMACON0 ( *(volatile s_PDMACON *) PDMACON0 )#define sPDMASRC0 r32( PDMASRC0 )#define sPDMADST0 r32( PDMADST0 )#define sPDMACNT0 r32( PDMACNT0 )#define sPDMARUN0 r32( PDMARUN0 )#define sPDMACON1 ( *(volatile s_PDMACON *) PDMACON1 )#define sPDMASRC1 r32( PDMASRC1 )#define sPDMADST1 r32( PDMADST1 )#define sPDMACNT1 r32( PDMACNT1 )#define sPDMARUN1 r32( PDMARUN1 )#define sPDMACON(ch) ( *(volatile s_PDMACON *) PDMACON(ch) )#define sPDMASRC(ch) r32( PDMASRC(ch) )#define sPDMADST(ch) r32( PDMADST(ch) )#define sPDMACNT(ch) r32( PDMACNT(ch) )#define sPDMARUN(ch) r32( PDMARUN(ch) )/*************************************************************************** Declarations for PCI SFR (SFR Structure Co-Type) co_ : Code Optimization or prefix which means 'additional' - no volatile & const declaration - These macros should be used in left side of equation. **************************************************************************/#define co_sPCIHID ( *(s_PCIHID *) PCIHID )#define co_sPCIHSC ( *(s_PCIHSC *) PCIHSC )#define co_sPCIHCODE ( *(s_PCIHCODE *) PCIHCODE )#define co_sPCIHLINE ( *(s_PCIHLINE *) PCIHLINE )#define co_sPCIHBAR0 ( *(s_PCIHMBAR *) PCIHBAR0 )#define co_sPCIHBAR1 ( *(s_PCIHMBAR *) PCIHBAR1 )#define co_sPCIHBAR2 ( *(s_PCIHIBAR *) PCIHBAR2 )#define co_sPCIHCISP ( *(s_PCIHCISP *) PCIHCISP )#define co_sPCIHSSID ( *(s_PCIHSSID *) PCIHSSID )#define co_sPCIHCAP ( *(s_PCIHCAP *) PCIHCAP )#define co_sPCIHLTIT ( *(s_PCIHLTIT *) PCIHLTIT )#define co_sPCIHTIMER ( *(s_PCIHTIMER *) PCIHTIMER )#define co_sPCIHPMR0 ( *(s_PCIHPMR0 *) PCIHPMR0 )#define co_sPCIHPMR1 ( *(s_PCIHPMR1 *) PCIHPMR1 )#define co_sPCIHCMD ( *(s_PCIHSC_D *) PCIHSC )#define co_sPCIHSTS ( *(s_PCIHSC_D *) PCIHSC )#define co_sPCIHHDTYPE ( *(s_PCIHLINE_D*) PCIHLINE )#define co_sPCIHBIST ( *(s_PCIHLINE_D*) PCIHLINE )#define co_sPCIHPMC ( *(s_PCIHPMR0_D*) PCIHPMR0 )#define co_sPCIHPMCSR ( *(s_PCIHPMR1_D*) PCIHPMR1 )#define co_sPCIHPMBSE ( *(s_PCIHPMR1_D*) PCIHPMR1 )#define co_sPCICON ( *(s_PCICON *) PCICON )#define co_sPCISET ( *(s_PCISET *) PCISET )#define co_sPCIINTEN ( *(s_PCIINTEN *) PCIINTEN )#define co_sPCIINTST ( *(s_PCIINTST *) PCIINTST )#define co_sPCIINTAD co_r32( PCIINTAD )#define co_sPCIBATAPM ( *(s_PCIBATAPM *) PCIBATAPM )#define co_sPCIBATAPI ( *(s_PCIBATAPI *) PCIBATAPI )#define co_sPCIRCC ( *(s_PCIRCC *) PCIRCC )#define co_sPCIDIAG0 ( *(s_PCIDIAG0 *) PCIDIAG0 )#define co_sPCIDIAG1 ( *(s_PCIDIAG1 *) PCIDIAG1 )#define co_sPCIBELAP ( *(s_PCIBEL *) PCIBELAP )#define co_sPCIBELPA ( *(s_PCIBEL *) PCIBELPA )#define co_sPCIMAIL0 co_r32( PCIMAIL0 )#define co_sPCIMAIL1 co_r32( PCIMAIL1 )#define co_sPCIMAIL2 co_r32( PCIMAIL2 )#define co_sPCIMAIL3 co_r32( PCIMAIL3 )#define co_sPCIBATPA0 ( *(s_PCIBATPA0 *) PCIBATPA0 )#define co_sPCIBAM0 ( *(s_PCIBAM0 *) PCIBAM0 )#define co_sPCIBATPA1 ( *(s_PCIBATPA1 *) PCIBATPA1 )#define co_sPCIBAM1 ( *(s_PCIBAM1 *) PCIBAM1 )#define co_sPCIBATPA2 ( *(s_PCIBATPA2 *) PCIBATPA2 )#define co_sPCIBAM2 ( *(s_PCIBAM2 *) PCIBAM2 )#define co_sPCISWAP ( *(s_PCISWAP *) PCISWAP )#define co_sPCCARDEVT ( *(s_PCCARDEVT *) PCCARDEVT )#define co_sPCCARDEVM ( *(s_PCCARDEVM *) PCCARDEVM )#define co_sPCCARDPRS ( *(s_PCCARDPRS *) PCCARDPRS )#define co_sPCCARDFEV ( *(s_PCCARDFEV *) PCCARDFEV )#define co_fPCCARDEVT ( *(f_PCCARDEVT *) PCCARDEVT )#define co_fPCCARDEVM ( *(f_PCCARDEVM *) PCCARDEVM )#define co_fPCCARDPRS ( *(f_PCCARDPRS *) PCCARDPRS )#define co_fPCCARDFEV ( *(f_PCCARDFEV *) PCCARDFEV )#define co_sPCCARDCON ( *(s_PCCARDCON *) PCCARDCON )#define co_sPCCARD16C ( *(s_PCCARD16C *) PCCARD16C )#define co_sPCCARD16M ( *(s_PCCARD16T *) PCCARD16M )#define co_sPCCARD16I ( *(s_PCCARD16T *) PCCARD16I )#define co_sPDMACON0 ( *(s_PDMACON *) PDMACON0 )#define co_sPDMASRC0 co_r32( PDMASRC0 )#define co_sPDMADST0 co_r32( PDMADST0 )#define co_sPDMACNT0 co_r32( PDMACNT0 )#define co_sPDMARUN0 co_r32( PDMARUN0 )#define co_sPDMACON1 ( *(s_PDMACON *) PDMACON1 )#define co_sPDMASRC1 co_r32( PDMASRC1 )#define co_sPDMADST1 co_r32( PDMADST1 )#define co_sPDMACNT1 co_r32( PDMACNT1 )#define co_sPDMARUN1 co_r32( PDMARUN1 )#define co_sPDMACON(ch) ( *(s_PDMACON *) PDMACON(ch) )#define co_sPDMASRC(ch) co_r32( PDMASRC(ch) )#define co_sPDMADST(ch) co_r32( PDMADST(ch) )#define co_sPDMACNT(ch) co_r32( PDMACNT(ch) )#define co_sPDMARUN(ch) co_r32( PDMARUN(ch) )#define PCI_IAE (0x1<<1)#define PCI_EPCLK (0x1<<2)#define PCI_SPLIT (0x1<<5)#define PCI_BUS_RESET (0x1<<0)#define PCI_LOGIC_RESET (0x1<<1)#define PCI_CLKMSK (0x1<<2)#define PCI_33M (0x1<<3)#define PDMA_BUSY ((unsigned long)0x1<<31)#define PDMA_PRG (0x1<<30)#define PDMA_RE (0x1)#define TRCV_FIFO (0x1<<8)#define TXMT_FIFO (0x1<<9)#define MRCV_FIFO (0x1<<10)#define MXMT_FIFO (0x1<<11)/* PCI SFR Related Macros *//* Operation mode */#define IsPciMode() (!sPCICON.CAR)#define PCCardMode() ( sPCICON.CAR)#define HostMode() ( sPCICON.HST)#define AgentMode() (!sPCICON.HST)#define PCI_HostMode() (!sPCICON.CAR && sPCICON.HST )#define PCI_AgentMode() (!sPCICON.CAR && !sPCICON.HST )#define PCCard_HostMode() ( sPCICON.CAR && sPCICON.HST )#define PCCard_AgentMode() ( sPCICON.CAR && !sPCICON.HST )#define PCMCIA_HostMode() ( sPCCARD16C.C16 )/* Get AHB Address for PCI Bus or CardBus Transaction */#define ENC_ADDR(device) (device)/* AHB_ADDR_PCI_MEM, AHB_ADDR_PCI_IO, AHB_ADDR_PCI_SPEC *//* MEM_BASE_WIDTH=4, IO_BASE_WIDTH=6 */#define AHB_ADDR_PCI_MEM (addr) (PCIMEM_ADDR|(0x0FFFFFFF&(unsigned long)(addr)))#define PDMA_ADDR_PCI_MEM(addr) (addr)#define AHB_ADDR_PCI_IO(addr) (PCIIO_ADDR |(0x03FFFFFF&(unsigned long)(addr)))#define PDMA_ADDR_PCI_IO(addr) (addr)#define AHB_ADDR_PCI_CFG0( device, functn, offset ) \ (PCICFG0_ADDR | ((ENC_ADDR(device)&0x1F)<<11) | \ (( (functn) &0x07)<< 8) | \ (( (offset) &0xFF) ) )#define PDMA_ADDR_PCI_CFG0( device, functn, offset ) \ ( ( 1 << (ENC_ADDR(device)+10)) | \ (( (functn) &0x07)<< 8) | \ (( (offset) &0xFF) ) )#define AHB_ADDR_PCI_CFG1( bus, device, functn, offset ) \ (PCICFG1_ADDR | (( (bus) &0xFF)<<16) | \ ((ENC_ADDR(device)&0x1F)<<11) | \ (( (functn) &0x07)<< 8) | \ (( (offset) &0xFF) ) )#define PDMA_ADDR_PCI_CFG1( bus, device, functn, offset ) \ ( (( (bus) &0xFF)<<16) | \ ((ENC_ADDR(device)&0x1F)<<11) | \ (( (functn) &0x07)<< 8) | \ (( (offset) &0xFF) ) ) #define AHB_ADDR_PCI_SPEC(addr) (PCISPEC_ADDR |(0x03FFFFFF&(unsigned long)(addr))#define PDMA_ADDR_PCI_SPEC(addr) (addr)typedef struct{ void *addr; char *name; u32 ResetValue; u32 InitializedValue;}s_SFR;#define ALL_WRITE1CLR 0xffffffff#define WRITE1CLR 0x1#define WRITE0CLR 0x0#define Enable_Int(n) *S3C2510_INTINTMASK &= (~((unsigned long)1<<(n))) /*ry++c */#define GlobalEn_Int() *S3C2510_EXTINTMASK &= (~((unsigned long)1<<31)) /*ry++c*/#define GlobalDis_Int() *S3C2510_EXTINTMASK |= ((unsigned long)1<<31) /*ryc++*/#define IIOPDATA1 *(volatile unsigned int*)IOPDATA1#endif /*_S3C2510PCI_DEF_H_ */⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -