config.h

VxWorks BSP for AT91RM92

/* config.h - ARM CSB337 configuration header */

/* Copyright 2004 Wind River Systems, Inc. */

/*
modification history
--------------------
01a,07sep04,pdr  written
*/

/*
This module contains the configuration parameters for the ARM CSB337 BSP.
*/

#ifndef	INCconfigh
#define	INCconfigh

#ifdef __cplusplus
extern "C" {
#endif

/* BSP version/revision identification, before configAll.h */

#define BSP_VER_1_1     1       /* 1.2 is backwards compatible with 1.1 */
#define BSP_VER_1_2     1
#define BSP_VERSION	"1.2"
#define BSP_REV		"/0"	/* 0 for first revision */

#include "configAll.h"


/* define this macro to enable system heart beat on usr led0 */
#define INCLUDE_HEART_BEAT

/* default bootline */
#define DEFAULT_BOOT_LINE_WRS \
        "ln(0,0)host:/usr/wpwr/target/config/template/vxWorks " \
        "h=90.0.0.3 e=90.0.0.50 u=username tn=targetname"

#define BOOT_TSFS	\
	"tsfs(0,0)host:vxWorks e=147.11.96.60 h=147.11.96.118 u=csb pw=csb f=0x8 tn=csb337"

#define BOOT_EMAC	\
	"emac(0,0)host:vxWorks e=147.11.96.60 h=147.11.96.199 u=csb pw=csb f=0x8 tn=csb337"

#define DEFAULT_BOOT_LINE	BOOT_EMAC

/* Memory configuration */

#undef	LOCAL_MEM_AUTOSIZE			/* run-time memory sizing (not supported) */
#define USER_RESERVED_MEM	0		/* see sysMemTop() */

/*
 * Local-to-Bus memory address constants:
 * the local memory address always appears at 0 locally;
 * it is not dual ported.
 */

#define LOCAL_MEM_LOCAL_ADRS	0x20000000	/* fixed */
#define LOCAL_MEM_BUS_ADRS	    0x20000000	/* fixed */
#define LOCAL_MEM_SIZE	        0x02000000	/* 32 Mbytes */
#define LOCAL_MEM_END_ADRS	    (LOCAL_MEM_LOCAL_ADRS + LOCAL_MEM_SIZE)


/*
 * The constants ROM_TEXT_ADRS, ROM_SIZE, RAM_HIGH_ADRS, and RAM_LOW_ADRS
 * are defined in config.h and Makefile.
 * All definitions for these constants must be identical.
 */

/*
 * Boot ROM is an image written into Flash. Part of the Flash can be
 * reserved for boot parameters etc. (see the Flash section below).
 *
 * The following parameters are defined here and in the Makefile.
 * They must be kept synchronized; effectively config.h depends on Makefile.
 * Any changes made here must be made in the Makefile and vice versa.
 *
 * ROM_BASE_ADRS is the base of the Flash ROM/EPROM.
 * ROM_TEXT_ADRS is the entry point of the VxWorks image
 * ROM_SIZE is the size of the part of the Flash ROM/EPROM allocated to
 *		the VxWorks image (block size - size of headers)
 *
 * Two other constants are used:
 * ROM_COPY_SIZE is the size of the part of the ROM to be copied into RAM
 * 		 (e.g. in uncompressed boot ROM)
 * ROM_SIZE_TOTAL is the size of the entire Flash ROM (used in sysPhysMemDesc)
 *
 * The values are given as literals here to make it easier to ensure
 * that they are the same as those in the Makefile.
 */

#define ROM_BASE_ADRS		0x10000000	    /* base of Flash/EPROM */
#define ROM_TEXT_ADRS		ROM_BASE_ADRS	/* code start addr in ROM */
#define ROM_SIZE            0x00800000      /* size of ROM holding VxWorks*/

#define RAM_LOW_ADRS		0x20001000	/* VxWorks image entry point */
#define RAM_HIGH_ADRS		0x20600000	/* RAM address for ROM boot */


/*
 * Count for a CPU delay loop at the beginning of romInit. There have been
 * reports of problems with certain boards and certain power supplies, and
 * adding a delay at the start of romInit appears to help with this. This
 * value may need tuning for different board/PSU combinations.
 */

#define CSB337_DELAY_VALUE	10  /* 0x1000 */

/*
 * Flash/NVRAM memory configuration
 *
 * Enable NvRam to use the last 512 bytes of flash
 */

#define INCLUDE_FLASH

#ifdef INCLUDE_FLASH
  
  #define FLASH_BASE_ADRS       ROM_BASE_ADRS       
  #define FLASH_SIZE			ROM_SIZE	        /* Flash memory size */

  #undef  FLASH_ADRS
  #define FLASH_ADRS			FLASH_BASE_ADRS

  #define SYS_FLASH_TYPE        FLASH_28F640J3A     /* Specify 28F640J3A 16-bit, 8MB part */
  #define FLASH_WIDTH		    2	  	            /* one 16-bit wide parts */
  #define FLASH_CHIP_WIDTH      2
  #define FLASH_WIDTH_SPECIAL_2			            /* see flash28.h */
  #define FLASH_SECTOR_SIZE     0x20000		        /* sector size of 28F640 (128 KB) */
  #define NV_RAM_ADRS	        0x7e0000            /* last flash sector */
  #undef  FLASH_SIZE_WRITEABLE	
  #define NV_RAM_SIZE	        FLASH_SECTOR_SIZE
  #define NV_INIT_SIZE          (FLASH_SECTOR_SIZE - 0x200)
  #undef  NV_BOOT_OFFSET	     /* room for init indicator */
  #define NV_BOOT_OFFSET        NV_INIT_SIZE  
  #define SYS_FLASH_DELAY

  #define FLASH_SECTOR_MASK     0xfffe0000
  #define FLASH_SECTOR(adrs)    (adrs & FLASH_SECTOR_MASK)
  
  #define INCLUDE_FLASH_LOADER          /* flash upgrading support */
  #define INCLUDE_FLASH_WRITE_BUFFER    /* using write buffer to accelerate programming speed */

  

#else /* INCLUDE_FLASH */
  
  #define NV_RAM_SIZE	        NONE

#endif 



/* Serial port configuration */

#define INCLUDE_SERIAL
#undef	NUM_TTY
#define NUM_TTY			    N_SIO_CHANNELS

#undef	CONSOLE_TTY
#define	CONSOLE_TTY		    1	/* console channel (0 = DBGU, 1 = USART1) */


#undef CONSOLE_BAUD_RATE
#define CONSOLE_BAUD_RATE	38400 /* 115200 can be used if not used for VTS */ /* console baud rate */

#undef INCLUDE_TSFS_BOOT	/* boot over target file system */

#ifdef INCLUDE_TSFS_BOOT
#undef 	WDB_COMM_TYPE
#define WDB_COMM_TYPE 		WDB_COMM_SERIAL
#undef 	WDB_TTY_CHANNEL
#define WDB_TTY_CHANNEL 	0	/* WDB channel (0 = DBGU, 1 = USART1) */
#undef 	WDB_TTY_BAUD
#define WDB_TTY_BAUD		38400   /* 38400 - > maximal speed working on CSB337 */
#endif /* INCLUDE_TSFS_BOOT */

/*
 * Use the Peripheral Data Controller. To use the USARTs in
 * character-at-a-time mode, undefine this.
 */

#undef AT91_USE_PDC /* can be defined when WDB is not used as serial connection */

/*
 * Cache/MMU configuration
 *
 * Note that when MMU is enabled, cache modes are controlled by
 * the MMU table entries in sysPhysMemDesc[], not the cache mode
 * macros defined here.
 */

/*
 * We use the generic architecture libraries, with caches/MMUs present. A
 * call to sysHwInit0() is needed from within usrInit before
 * cacheLibInit() is called.
 */

#ifndef _ASMLANGUAGE
IMPORT void sysHwInit0 (void);
#endif

#define INCLUDE_SYS_HW_INIT_0
#define SYS_HW_INIT_0()         sysHwInit0 ()

/*
 * 920T/940T/946ES I-cache mode is a bit of an inappropriate concept,
 * but use this.
 * */

#undef  USER_I_CACHE_MODE
#define USER_I_CACHE_MODE       CACHE_WRITETHROUGH

/* 920T/940T/946ES has to be this. */

#undef  USER_D_CACHE_MODE
#define USER_D_CACHE_MODE       CACHE_COPYBACK


/* MMU configuration */


/*
 * Include MMU BASIC and CACHE support for command line and project builds
 */

#define	INCLUDE_MMU_BASIC
#undef  INCLUDE_MMU_FULL
#undef  INCLUDE_MMU_MPU

#define INCLUDE_CACHE_SUPPORT

/*
 * Network driver configuration.
 *
 * De-select unused (default) network drivers selected in configAll.h.
 */

#undef	INCLUDE_SM_NET		/* include backplane net interface */
#undef	INCLUDE_SM_SEQ_ADDR	/* shared memory network auto address setup */

/* Enhanced Network Driver (END) Support */

#define  INCLUDE_END

#ifdef	INCLUDE_END
#define INCLUDE_EMAC_END    /* on-chip EMAC (AT91RM9200) */
#undef  WDB_COMM_TYPE		/* WDB agent communication path is END */
#define WDB_COMM_TYPE	WDB_COMM_END

#endif  /* INCLUDE_END */

/* MAC Address configuration */

#if defined(INCLUDE_EMAC_END)

#define MAC_ADRS_LEN            6 /* 6 bytes in MAC address */

#define CSB_ENET0                0x00 /* Cogent specific portion of MAC (MSB->LSB) */
#define CSB_ENET1                0x23
#define CSB_ENET2                0x31     

#define CUST_ENET3               0x37 /* Customer specific portion of MAC address */
#define CUST_ENET4               0x01
#define CUST_ENET5               0x61

#define ENET_DEFAULT            0x00002331  /* MAC starts with 00:23:31 */
#define ETHERNET_MAC_ADRS       {CSB_ENET0, CSB_ENET1, CSB_ENET2, CUST_ENET3, CUST_ENET4, CUST_ENET5}

#define ETHERNET_ADR_SET   /* (used in bootConfig.c to enable 'N' command) */

#endif /* INCLUDE_EMAC_END */


/* PCI configuration - no PCI support */

#undef INCLUDE_PCI

/*
 * Interrupt mode - interrupts can be in either preemptive or non-preemptive
 * mode.  For non-preemptive mode, change INT_MODE to INT_NON_PREEMPT_MODEL
 */

#define  INT_MODE	INT_PREEMPT_MODEL

/*
 * Enable use of the Protect Mode feature in the AT91 Interrupt
 * controller: allows the Interrupt Vector register to be read by
 * debuggers.
 */

#define AT91_INT_USE_PROTECT_MODE


/*
 * miscellaneous definitions
 * Note: ISR_STACK_SIZE is defined here rather than in ../all/configAll.h
 * (as is more usual) because the stack size depends on the interrupt
 * structure of the BSP.
 */

#define ISR_STACK_SIZE	0x800	/* size of ISR stack, in bytes */


/* Optional timestamp support */

#undef	INCLUDE_TIMESTAMP	/* define to include timestamp driver */
#define INCLUDE_TIMESTAMP


/* Optional TrueFFS support */

#undef	INCLUDE_TFFS		/* define to include TrueFFS driver */

#ifdef INCLUDE_TFFS
#define INCLUDE_SHOW_ROUTINES
#define INCLUDE_DOSFS
#endif /* INCLUDE_TFFS */

#include "csb337.h"

#undef BSP_VTS
#ifdef BSP_VTS
/***************************************************
 * Add these defines for the Validation Test Suite *
 ***************************************************/
#define INCLUDE_SHELL
#define INCLUDE_RLOGIN
#define INCLUDE_SHOW_ROUTINES
#define INCLUDE_NET_SYM_TBL
#define INCLUDE_LOADER

#define INCLUDE_PING
#define INCLUDE_NET_SHOW
#define INCLUDE_ICMP_SHOW
#define INCLUDE_UDP_SHOW
#endif /*BSP_VTS*/

#ifdef __cplusplus
}
#endif
#endif  /* INCconfigh */

#if defined(PRJ_BUILD)
#include "prjParams.h"
#endif