cordic_tb.vhd

VHDL to System C translator

-------------------------------------------------------------------------------
--                                                                           --
--  Simple Cordic                                                            --
--  Copyright (C) 1999 HT-LAB                                                --
--                                                                           --
--  Contact/Feedback : http://www.ht-lab.com/feedback.htm                    --
--  Web: http://www.ht-lab.com                                               --
--                                                                           --
-------------------------------------------------------------------------------
--                                                                           --
--  This library is free software; you can redistribute it and/or            --
--  modify it under the terms of the GNU Lesser General Public               --
--  License as published by the Free Software Foundation; either             --
--  version 2.1 of the License, or (at your option) any later version.       --
--                                                                           --
--  This library is distributed in the hope that it will be useful,          --
--  but WITHOUT ANY WARRANTY; without even the implied warranty of           --
--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU        --
--  Lesser General Public License for more details.                          --
--                                                                           --
--  Full details of the license can be found in the file "copying.txt".      --
--                                                                           --
--  You should have received a copy of the GNU Lesser General Public         --
--  License along with this library; if not, write to the Free Software      --
--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA  --
--                                                                           --
-------------------------------------------------------------------------------
-- TestBench																 --
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;

library std;
use std.textio.all;

use work.cordic_pkg.all;
    
entity cordic_tb is	
end cordic_tb;


architecture stimulus of cordic_tb is

component Cordic   
   port(clk    : in  std_logic;                    
        reset  : in  std_logic;                     -- Active low reset
        angle  : in  std_logic_vector(31 downto 0); -- input radian 
        sin    : out std_logic_vector(31 downto 0); 
        cos    : out std_logic_vector(31 downto 0);       
        start  : in  std_logic; 
        done   : out std_logic);              
end component;        


signal clk_s   : std_logic;
signal reset_s : std_logic;
signal angle_s : std_logic_vector(31 downto 0);
signal sin_s   : std_logic_vector(31 downto 0);
signal cos_s   : std_logic_vector(31 downto 0);
signal start_s : std_logic;
signal done_s  : std_logic;
    
begin
    
 UUT : Cordic port map(clk_s,reset_s,angle_s,sin_s,cos_s,start_s,done_s);			
 
 process      -- System Clock
   variable c:std_logic :='1';
   begin
      c := not c;
      clk_s <= c;  
      wait for 50 ns;
   end process;

 process
   variable L : line; -- used for monitor
   begin
     reset_s <= '0'; -- reset asserted
     start_s <= '0';
     angle_s <= (others => '0');  
     wait for 200 ns;
     
     reset_s <= '1'; -- reset released
     
     assert FALSE report "*** Start of Test ***" severity note;
         
     angle_s <= X"08efa351"; -- 8deg answer=08e88573, 3f6081f1
     start_s <= '1';     
     wait for 150 ns;
     start_s <= '0';     
     wait until done_s='1';     
     write(L,string'("Angle x=")) ;
     write(L,std_to_hex(angle_s));
     write(L,string'("  SIN(x)="));
     write(L,std_to_hex(sin_s));
     write(L,string'(" [08E88573]"));          
     write(L,string'(" COS(x)="));
     write(L,std_to_hex(cos_s));     
     write(L,string'(" [3F6081F1]"));
     writeline(output,L);
     wait for 150 ns;
     

     angle_s <= X"9ed1efee"; -- -87  answer=C0166DF5 0358FE0D     
     start_s <= '1';     
     wait for 150 ns;
     start_s <= '0';     
     wait until done_s='1';     
     write(L,string'("Angle x=")) ;
     write(L,std_to_hex(angle_s));
     write(L,string'("  SIN(x)="));
     write(L,std_to_hex(sin_s));          
     write(L,string'(" [C0166DF5]"));  
     write(L,string'(" COS(x)="));
     write(L,std_to_hex(cos_s));    
     write(L,string'(" [0358FE0D]"));   
     writeline(output,L);
     wait for 150 ns;
            
     angle_s <= X"612e1012"; -- 87 answer=3fe9920a 0358FE0D  
     start_s <= '1';     
     wait for 150 ns;
     start_s <= '0';     
     wait until done_s='1';     
     write(L,string'("Angle x=")) ;
     write(L,std_to_hex(angle_s));
     write(L,string'("  SIN(x)="));
     write(L,std_to_hex(sin_s)); 
     write(L,string'(" [3FE9920A]"));          
     write(L,string'(" COS(x)="));
     write(L,std_to_hex(cos_s));  
     write(L,string'(" [0358FE0D]"));    
     writeline(output,L);
     wait for 150 ns;

     angle_s <= X"37d9bcbb"; -- 50deg answer=3106f086 292359b4        
     start_s <= '1';     
     wait for 150 ns;
     start_s <= '0';     
     wait until done_s='1';     
     write(L,string'("Angle x=")) ;
     write(L,std_to_hex(angle_s));
     write(L,string'("  SIN(x)="));
     write(L,std_to_hex(sin_s));  
     write(L,string'(" [3106F086]"));         
     write(L,string'(" COS(x)="));
     write(L,std_to_hex(cos_s));     
     write(L,string'(" [292359B4]")); 
     writeline(output,L);
         
     wait for 40 us;

     assert FALSE report "*** End of Test ***" severity failure;

   end process;
   
end STIMULUS;