sdsdi_rxtx_demoboard.qsf

DVB系统的SDI数据数据传输接口

set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name AUTO_RESTART_CONFIGURATION OFF
set_global_assignment -name DEVICE EP1SGX25FF1020C7ES
set_instance_assignment -name IO_STANDARD LVTTL -to asi_led\[0\]
set_instance_assignment -name IO_STANDARD LVTTL -to asi_led\[1\]
set_instance_assignment -name IO_STANDARD LVTTL -to asi_led\[2\]
set_instance_assignment -name IO_STANDARD LVTTL -to asi_led\[3\]
set_instance_assignment -name IO_STANDARD LVDS -to sma_rx
set_instance_assignment -name IO_STANDARD LVDS -to sma_tx
set_instance_assignment -name IO_STANDARD LVTTL -to button\[0\]
set_instance_assignment -name IO_STANDARD LVTTL -to button\[1\]
set_instance_assignment -name IO_STANDARD LVTTL -to button\[2\]
set_instance_assignment -name IO_STANDARD LVTTL -to button\[3\]
set_instance_assignment -name IO_STANDARD LVTTL -to clock_ref
set_instance_assignment -name IO_STANDARD LVDS -to ext_video_clk
set_instance_assignment -name IO_STANDARD LVDS -to spare_clk
set_instance_assignment -name IO_STANDARD LVTTL -to ics660_sel
set_instance_assignment -name IO_STANDARD LVTTL -to mk2069_clrn
set_instance_assignment -name IO_STANDARD LVTTL -to ref27_e
set_instance_assignment -name IO_STANDARD LVDS -to refclk2
set_instance_assignment -name IO_STANDARD LVTTL -to refclk2_sel
set_instance_assignment -name IO_STANDARD LVDS -to rxclk_out
set_instance_assignment -name IO_STANDARD LVTTL -to sdi_led\[0\]
set_instance_assignment -name IO_STANDARD LVTTL -to sdi_led\[1\]
set_instance_assignment -name IO_STANDARD LVTTL -to sdi_led\[2\]
set_instance_assignment -name IO_STANDARD LVTTL -to sdi_led\[3\]
set_instance_assignment -name IO_STANDARD LVTTL -to sdi_led\[4\]
set_instance_assignment -name IO_STANDARD LVTTL -to sdi_led\[5\]
set_instance_assignment -name IO_STANDARD LVTTL -to sdi_led\[6\]
set_instance_assignment -name IO_STANDARD LVTTL -to sdi_led\[7\]
set_instance_assignment -name IO_STANDARD LVTTL -to sdi_rate\[0\]
set_instance_assignment -name IO_STANDARD LVTTL -to sdi_rate\[1\]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to sdi_rx
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to sdi_tx
set_instance_assignment -name IO_STANDARD LVTTL -to switch\[0\]
set_instance_assignment -name IO_STANDARD LVTTL -to switch\[1\]
set_instance_assignment -name IO_STANDARD LVTTL -to switch\[2\]
set_instance_assignment -name IO_STANDARD LVTTL -to switch\[3\]
set_instance_assignment -name IO_STANDARD LVTTL -to switch\[4\]
set_instance_assignment -name IO_STANDARD LVTTL -to switch\[5\]
set_instance_assignment -name IO_STANDARD LVTTL -to switch\[6\]
set_instance_assignment -name IO_STANDARD LVTTL -to switch\[7\]
set_instance_assignment -name IO_STANDARD LVTTL -to usr_led\[0\]
set_instance_assignment -name IO_STANDARD LVTTL -to usr_led\[1\]
set_instance_assignment -name IO_STANDARD LVTTL -to usr_led\[2\]
set_instance_assignment -name IO_STANDARD LVTTL -to usr_led\[3\]
set_instance_assignment -name IO_STANDARD LVTTL -to usr_led\[4\]
set_instance_assignment -name IO_STANDARD LVTTL -to usr_led\[5\]

# Timing Analysis Assignments
# ===========================
set_global_assignment -name NUMBER_OF_PATHS_TO_REPORT 500
set_global_assignment -name MAX_SCC_SIZE 50
set_global_assignment -name RUN_ALL_TIMING_ANALYSES ON

# EDA Netlist Writer Assignments
# ==============================
set_global_assignment -name EDA_FORMAL_VERIFICATION_TOOL "<NONE>"
set_global_assignment -name EDA_BOARD_DESIGN_TOOL "<NONE>"
set_global_assignment -name EDA_TIMING_ANALYSIS_TOOL "<NONE>"

# Assembler Assignments
# =====================
set_global_assignment -name USE_CONFIGURATION_DEVICE OFF

# Simulator Assignments
# =====================
set_global_assignment -name GLITCH_INTERVAL 1NS
set_global_assignment -name POWER_ESTIMATION_START_TIME "0 NS"
set_global_assignment -name START_TIME 0NS

# Design Assistant Assignments
# ============================
set_global_assignment -name HCPY_ALOAD_SIGNALS OFF
set_global_assignment -name HCPY_VREF_PINS OFF
set_global_assignment -name HCPY_CAT OFF
set_global_assignment -name ACLK_RULE_IMSZER_ADOMAIN OFF
set_global_assignment -name ACLK_RULE_SZER_BTW_ACLK_DOMAIN OFF
set_global_assignment -name ACLK_RULE_NO_SZER_ACLK_DOMAIN OFF
set_global_assignment -name ACLK_CAT OFF
set_global_assignment -name SIGNALRACE_RULE_ASYNCHPIN_SYNCH_CLKPIN OFF
set_global_assignment -name SIGNALRACE_CAT OFF
set_global_assignment -name NONSYNCHSTRUCT_RULE_LATCH_UNIDENTIFIED OFF
set_global_assignment -name NONSYNCHSTRUCT_RULE_SRLATCH OFF
set_global_assignment -name NONSYNCHSTRUCT_RULE_MULTI_VIBRATOR OFF
set_global_assignment -name NONSYNCHSTRUCT_RULE_ILLEGAL_PULSE_GEN OFF
set_global_assignment -name NONSYNCHSTRUCT_RULE_RIPPLE_CLK OFF
set_global_assignment -name NONSYNCHSTRUCT_RULE_DELAY_CHAIN OFF
set_global_assignment -name NONSYNCHSTRUCT_RULE_REG_LOOP OFF
set_global_assignment -name NONSYNCHSTRUCT_RULE_COMBLOOP OFF
set_global_assignment -name NONSYNCHSTRUCT_CAT OFF
set_global_assignment -name NONSYNCHSTRUCT_RULE_COMB_DRIVES_RAM_WE OFF
set_global_assignment -name TIMING_RULE_COIN_CLKEDGE OFF
set_global_assignment -name TIMING_RULE_SHIFT_REG OFF
set_global_assignment -name TIMING_CAT OFF
set_global_assignment -name RESET_RULE_IMSYNCH_ASYNCH_DOMAIN OFF
set_global_assignment -name RESET_RULE_UNSYNCH_ASYNCH_DOMAIN OFF
set_global_assignment -name RESET_RULE_COMB_ASYNCH_RESET OFF
set_global_assignment -name RESET_RULE_IMSYNCH_EXRESET OFF
set_global_assignment -name RESET_RULE_UNSYNCH_EXRESET OFF
set_global_assignment -name RESET_RULE_INPINS_RESETNET OFF
set_global_assignment -name RESET_CAT OFF
set_global_assignment -name CLK_RULE_MIX_EDGES OFF
set_global_assignment -name CLK_RULE_CLKNET_CLKSPINES OFF
set_global_assignment -name CLK_RULE_INPINS_CLKNET OFF
set_global_assignment -name CLK_RULE_GATING_SCHEME OFF
set_global_assignment -name CLK_RULE_INV_CLOCK OFF
set_global_assignment -name CLK_RULE_COMB_CLOCK OFF
set_global_assignment -name CLK_CAT OFF
set_global_assignment -name NONSYNCHSTRUCT_RULE_ASYN_RAM OFF
set_global_assignment -name ASSG_RULE_MISSING_TIMING OFF
set_global_assignment -name ASSG_RULE_MISSING_FMAX OFF
set_global_assignment -name ASSG_CAT OFF
set_global_assignment -name DRC_REPORT_FANOUT_EXCEEDING OFF
set_global_assignment -name DRC_REPORT_TOP_FANOUT OFF

# SignalTap II Assignments
# ========================
set_global_assignment -name ENABLE_SIGNALTAP On
set_global_assignment -name USE_SIGNALTAP_FILE debug.stp

# --------------------
# start CLOCK(rx_pclk)

	# Timing Assignments
	# ==================
	set_global_assignment -name FMAX_REQUIREMENT "135.0 MHz" -section_id rx_pclk
	set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF -section_id rx_pclk
	set_global_assignment -name DUTY_CYCLE 50 -section_id rx_pclk
	set_global_assignment -name DIVIDE_BASE_CLOCK_PERIOD_BY 1 -section_id rx_pclk
	set_global_assignment -name MULTIPLY_BASE_CLOCK_PERIOD_BY 1 -section_id rx_pclk
	set_global_assignment -name INVERT_BASE_CLOCK OFF -section_id rx_pclk

# end CLOCK(rx_pclk)
# ------------------

# ----------------------------------
# start ENTITY(sdsdi_rxtx_demoboard)

	# Timing Assignments
	# ==================
	set_instance_assignment -name CLOCK_SETTINGS rx_pclk -to "sdsdi_rxtx:u_demo\|freq_trans:u_freq_trans\|sclk_out~reg0"

	# Analysis & Synthesis Assignments
	# ================================
	set_instance_assignment -name AUTO_GLOBAL_CLOCK ON -to "sdsdi_rxtx:u_demo\|freq_trans:u_freq_trans\|sclk_out~reg0"

	# ------------------------------------
	# start LOGICLOCK_REGION(Oversampling)

		# LogicLock Region Assignments
		# ============================
		set_global_assignment -name LL_AUTO_SIZE OFF -section_id Oversampling
		set_global_assignment -name LL_HEIGHT 3 -section_id Oversampling
		set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id Oversampling
		set_global_assignment -name LL_ORIGIN LAB_X1_Y14 -section_id Oversampling
		set_global_assignment -name LL_RESERVED OFF -section_id Oversampling
		set_global_assignment -name LL_SOFT OFF -section_id Oversampling
		set_global_assignment -name LL_STATE LOCKED -section_id Oversampling
		set_global_assignment -name LL_WIDTH 9 -section_id Oversampling
		set_instance_assignment -name LL_MEMBER_OF Oversampling -to "sdsdi_rxtx:u_demo\|sdsdi_io_interface:u_io_interface\|gxb_rxsample:u_rxsample" -section_id Oversampling
		set_instance_assignment -name LL_MEMBER_OF Oversampling -to "sdsdi_rxtx:u_demo\|sdsdi_io_interface:u_io_interface\|s2p:u_s2p" -section_id Oversampling

	# end LOGICLOCK_REGION(Oversampling)
	# ----------------------------------

	# ------------------------------
	# start LOGICLOCK_REGION(rx_pll)

		# LogicLock Region Assignments
		# ============================
		set_global_assignment -name LL_ORIGIN X0_Y22 -section_id rx_pll
		set_global_assignment -name LL_HEIGHT 1 -section_id rx_pll
		set_global_assignment -name LL_WIDTH 2 -section_id rx_pll
		set_global_assignment -name LL_STATE LOCKED -section_id rx_pll
		set_global_assignment -name LL_AUTO_SIZE OFF -section_id rx_pll
		set_global_assignment -name LL_RESERVED OFF -section_id rx_pll
		set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id rx_pll
		set_global_assignment -name LL_SOFT OFF -section_id rx_pll
		set_instance_assignment -name LL_MEMBER_OF rx_pll -to "sdsdi_rxtx:u_demo\|sclk_pll_x50_4:u_pll_rx\|altpll:altpll_component" -section_id rx_pll

	# end LOGICLOCK_REGION(rx_pll)
	# ----------------------------

# end ENTITY(sdsdi_rxtx_demoboard)
# --------------------------------