📄 spi_bitbang.c
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269 static void bitbang_work(void *_bitbang)
270 {
271 struct spi_bitbang *bitbang = _bitbang;
272 unsigned long flags;
273
274 spin_lock_irqsave(&bitbang->lock, flags);
275 bitbang->busy = 1;
276 while (!list_empty(&bitbang->queue)) {
277 struct spi_message *m;
278 struct spi_device *spi;
279 unsigned nsecs;
280 struct spi_transfer *t = NULL;
281 unsigned tmp;
282 unsigned cs_change;
283 int status;
284 int (*setup_transfer)(struct spi_device *,
285 struct spi_transfer *);
286
287 m = container_of(bitbang->queue.next, struct spi_message,
288 queue);
289 list_del_init(&m->queue);
290 spin_unlock_irqrestore(&bitbang->lock, flags);
291
292 /* FIXME this is made-up ... the correct value is known to
293 * word-at-a-time bitbang code, and presumably chipselect()
294 * should enforce these requirements too?
295 */
296 nsecs = 100;
297
298 spi = m->spi;
299 tmp = 0;
300 cs_change = 1;
301 status = 0;
302 setup_transfer = NULL;
303
304 list_for_each_entry (t, &m->transfers, transfer_list) {
305 if (bitbang->shutdown) {
306 status = -ESHUTDOWN;
307 break;
308 }
309
310 /* override or restore speed and wordsize */
311 if (t->speed_hz || t->bits_per_word) {
312 setup_transfer = bitbang->setup_transfer;
313 if (!setup_transfer) {
314 status = -ENOPROTOOPT;
315 break;
316 }
317 }
318 if (setup_transfer) {
319 status = setup_transfer(spi, t);
320 if (status < 0)
321 break;
322 }
323
324 /* set up default clock polarity, and activate chip;
325 * this implicitly updates clock and spi modes as
326 * previously recorded for this device via setup().
327 * (and also deselects any other chip that might be
328 * selected ...)
329 */
330 if (cs_change) {
331 bitbang->chipselect(spi, BITBANG_CS_ACTIVE);
332 ndelay(nsecs);
333 }
334 cs_change = t->cs_change;
335 if (!t->tx_buf && !t->rx_buf && t->len) {
336 status = -EINVAL;
337 break;
338 }
339
340 /* transfer data. the lower level code handles any
341 * new dma mappings it needs. our caller always gave
342 * us dma-safe buffers.
343 */
344 if (t->len) {
345 /* REVISIT dma API still needs a designated
346 * DMA_ADDR_INVALID; ~0 might be better.
347 */
348 if (!m->is_dma_mapped)
349 t->rx_dma = t->tx_dma = 0;
350 status = bitbang->txrx_bufs(spi, t);
351 }
352 if (status != t->len) {
353 if (status > 0)
354 status = -EMSGSIZE;
355 break;
356 }
357 m->actual_length += status;
358 status = 0;
359
360 /* protocol tweaks before next transfer */
361 if (t->delay_usecs)
362 udelay(t->delay_usecs);
363
364 if (!cs_change)
365 continue;
366 if (t->transfer_list.next == &m->transfers)
367 break;
368
369 /* sometimes a short mid-message deselect of the chip
370 * may be needed to terminate a mode or command
371 */
372 ndelay(nsecs);
373 bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
374 ndelay(nsecs);
375 }
376
377 m->status = status;
378 m->complete(m->context);
379
380 /* restore speed and wordsize */
381 if (setup_transfer)
382 setup_transfer(spi, NULL);
383
384 /* normally deactivate chipselect ... unless no error and
385 * cs_change has hinted that the next message will probably
386 * be for this chip too.
387 */
388 if (!(status == 0 && cs_change)) {
389 ndelay(nsecs);
390 bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
391 ndelay(nsecs);
392 }
393
394 spin_lock_irqsave(&bitbang->lock, flags);
395 }
396 bitbang->busy = 0;
397 spin_unlock_irqrestore(&bitbang->lock, flags);
398 }
399
400 /**
401 * spi_bitbang_transfer - default submit to transfer queue
402 */
403 int spi_bitbang_transfer(struct spi_device *spi, struct spi_message *m)
404 {
405 struct spi_bitbang *bitbang;
406 unsigned long flags;
407 int status = 0;
408
409 m->actual_length = 0;
410 m->status = -EINPROGRESS;
411
412 bitbang = spi_master_get_devdata(spi->master);
413 if (bitbang->shutdown)
414 return -ESHUTDOWN;
415
416 spin_lock_irqsave(&bitbang->lock, flags);
417 if (!spi->max_speed_hz)
418 status = -ENETDOWN;
419 else {
420 list_add_tail(&m->queue, &bitbang->queue);
421 queue_work(bitbang->workqueue, &bitbang->work);
422 }
423 spin_unlock_irqrestore(&bitbang->lock, flags);
424
425 return status;
426 }
427 EXPORT_SYMBOL_GPL(spi_bitbang_transfer);
428
429 /*----------------------------------------------------------------------*/
430
431 /**
432 * spi_bitbang_start - start up a polled/bitbanging SPI master driver
433 * @bitbang: driver handle
434 *
435 * Caller should have zero-initialized all parts of the structure, and then
436 * provided callbacks for chip selection and I/O loops. If the master has
437 * a transfer method, its final step should call spi_bitbang_transfer; or,
438 * that's the default if the transfer routine is not initialized. It should
439 * also set up the bus number and number of chipselects.
440 *
441 * For i/o loops, provide callbacks either per-word (for bitbanging, or for
442 * hardware that basically exposes a shift register) or per-spi_transfer
443 * (which takes better advantage of hardware like fifos or DMA engines).
444 *
445 * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup and
446 * spi_bitbang_cleanup to handle those spi master methods. Those methods are
447 * the defaults if the bitbang->txrx_bufs routine isn't initialized.
448 *
449 * This routine registers the spi_master, which will process requests in a
450 * dedicated task, keeping IRQs unblocked most of the time. To stop
451 * processing those requests, call spi_bitbang_stop().
452 */
453 int spi_bitbang_start(struct spi_bitbang *bitbang)
454 {
455 int status;
456
457 if (!bitbang->master || !bitbang->chipselect)
458 return -EINVAL;
459
460 INIT_WORK(&bitbang->work, bitbang_work, bitbang);
461 spin_lock_init(&bitbang->lock);
462 INIT_LIST_HEAD(&bitbang->queue);
463
464 if (!bitbang->master->transfer)
465 bitbang->master->transfer = spi_bitbang_transfer;
466 if (!bitbang->txrx_bufs) {
467 bitbang->use_dma = 0;
468 bitbang->txrx_bufs = spi_bitbang_bufs;
469 if (!bitbang->master->setup) {
470 if (!bitbang->setup_transfer)
471 bitbang->setup_transfer =
472 spi_bitbang_setup_transfer;
473 bitbang->master->setup = spi_bitbang_setup;
474 bitbang->master->cleanup = spi_bitbang_cleanup;
475 }
476 } else if (!bitbang->master->setup)
477 return -EINVAL;
478
479 /* this task is the only thing to touch the SPI bits */
480 bitbang->busy = 0;
481 bitbang->workqueue = create_singlethread_workqueue(
482 bitbang->master->cdev.dev->bus_id);
483 if (bitbang->workqueue == NULL) {
484 status = -EBUSY;
485 goto err1;
486 }
487
488 /* driver may get busy before register() returns, especially
489 * if someone registered boardinfo for devices
490 */
491 status = spi_register_master(bitbang->master);
492 if (status < 0)
493 goto err2;
494
495 return status;
496
497 err2:
498 destroy_workqueue(bitbang->workqueue);
499 err1:
500 return status;
501 }
502 EXPORT_SYMBOL_GPL(spi_bitbang_start);
503
504 /**
505 * spi_bitbang_stop - stops the task providing spi communication
506 */
507 int spi_bitbang_stop(struct spi_bitbang *bitbang)
508 {
509 unsigned limit = 500;
510
511 spin_lock_irq(&bitbang->lock);
512 bitbang->shutdown = 0;
513 while (!list_empty(&bitbang->queue) && limit--) {
514 spin_unlock_irq(&bitbang->lock);
515
516 dev_dbg(bitbang->master->cdev.dev, "wait for queue\n");
517 msleep(10);
518
519 spin_lock_irq(&bitbang->lock);
520 }
521 spin_unlock_irq(&bitbang->lock);
522 if (!list_empty(&bitbang->queue)) {
523 dev_err(bitbang->master->cdev.dev, "queue didn't empty\n");
524 return -EBUSY;
525 }
526
527 destroy_workqueue(bitbang->workqueue);
528
529 spi_unregister_master(bitbang->master);
530
531 return 0;
532 }
533 EXPORT_SYMBOL_GPL(spi_bitbang_stop);
534
535 MODULE_LICENSE("GPL");
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