spi_bitbang.c

pxa3xx ssp driver for linux

 1 /*
  2  * spi_bitbang.c - polling/bitbanging SPI master controller driver utilities
  3  *
  4  * This program is free software; you can redistribute it and/or modify
  5  * it under the terms of the GNU General Public License as published by
  6  * the Free Software Foundation; either version 2 of the License, or
  7  * (at your option) any later version.
  8  *
  9  * This program is distributed in the hope that it will be useful,
 10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 12  * GNU General Public License for more details.
 13  *
 14  * You should have received a copy of the GNU General Public License
 15  * along with this program; if not, write to the Free Software
 16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 17  */
 18 
 19 #include <linux/config.h>
 20 #include <linux/init.h>
 21 #include <linux/spinlock.h>
 22 #include <linux/workqueue.h>
 23 #include <linux/interrupt.h>
 24 #include <linux/delay.h>
 25 #include <linux/errno.h>
 26 #include <linux/platform_device.h>
 27 
 28 #include <linux/spi/spi.h>
 29 #include <linux/spi/spi_bitbang.h>
 30 
 31 
 32 /*----------------------------------------------------------------------*/
 33 
 34 /*
 35  * FIRST PART (OPTIONAL):  word-at-a-time spi_transfer support.
 36  * Use this for GPIO or shift-register level hardware APIs.
 37  *
 38  * spi_bitbang_cs is in spi_device->controller_state, which is unavailable
 39  * to glue code.  These bitbang setup() and cleanup() routines are always
 40  * used, though maybe they're called from controller-aware code.
 41  *
 42  * chipselect() and friends may use use spi_device->controller_data and
 43  * controller registers as appropriate.
 44  *
 45  *
 46  * NOTE:  SPI controller pins can often be used as GPIO pins instead,
 47  * which means you could use a bitbang driver either to get hardware
 48  * working quickly, or testing for differences that aren't speed related.
 49  */
 50 
 51 struct spi_bitbang_cs {
 52         unsigned        nsecs;  /* (clock cycle time)/2 */
 53         u32             (*txrx_word)(struct spi_device *spi, unsigned nsecs,
 54                                         u32 word, u8 bits);
 55         unsigned        (*txrx_bufs)(struct spi_device *,
 56                                         u32 (*txrx_word)(
 57                                                 struct spi_device *spi,
 58                                                 unsigned nsecs,
 59                                                 u32 word, u8 bits),
 60                                         unsigned, struct spi_transfer *);
 61 };
 62 
 63 static unsigned bitbang_txrx_8(
 64         struct spi_device       *spi,
 65         u32                     (*txrx_word)(struct spi_device *spi,
 66                                         unsigned nsecs,
 67                                         u32 word, u8 bits),
 68         unsigned                ns,
 69         struct spi_transfer     *t
 70 ) {
 71         unsigned                bits = spi->bits_per_word;
 72         unsigned                count = t->len;
 73         const u8                *tx = t->tx_buf;
 74         u8                      *rx = t->rx_buf;
 75 
 76         while (likely(count > 0)) {
 77                 u8              word = 0;
 78 
 79                 if (tx)
 80                         word = *tx++;
 81                 word = txrx_word(spi, ns, word, bits);
 82                 if (rx)
 83                         *rx++ = word;
 84                 count -= 1;
 85         }
 86         return t->len - count;
 87 }
 88 
 89 static unsigned bitbang_txrx_16(
 90         struct spi_device       *spi,
 91         u32                     (*txrx_word)(struct spi_device *spi,
 92                                         unsigned nsecs,
 93                                         u32 word, u8 bits),
 94         unsigned                ns,
 95         struct spi_transfer     *t
 96 ) {
 97         unsigned                bits = spi->bits_per_word;
 98         unsigned                count = t->len;
 99         const u16               *tx = t->tx_buf;
100         u16                     *rx = t->rx_buf;
101 
102         while (likely(count > 1)) {
103                 u16             word = 0;
104 
105                 if (tx)
106                         word = *tx++;
107                 word = txrx_word(spi, ns, word, bits);
108                 if (rx)
109                         *rx++ = word;
110                 count -= 2;
111         }
112         return t->len - count;
113 }
114 
115 static unsigned bitbang_txrx_32(
116         struct spi_device       *spi,
117         u32                     (*txrx_word)(struct spi_device *spi,
118                                         unsigned nsecs,
119                                         u32 word, u8 bits),
120         unsigned                ns,
121         struct spi_transfer     *t
122 ) {
123         unsigned                bits = spi->bits_per_word;
124         unsigned                count = t->len;
125         const u32               *tx = t->tx_buf;
126         u32                     *rx = t->rx_buf;
127 
128         while (likely(count > 3)) {
129                 u32             word = 0;
130 
131                 if (tx)
132                         word = *tx++;
133                 word = txrx_word(spi, ns, word, bits);
134                 if (rx)
135                         *rx++ = word;
136                 count -= 4;
137         }
138         return t->len - count;
139 }
140 
141 int spi_bitbang_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
142 {
143         struct spi_bitbang_cs   *cs = spi->controller_state;
144         u8                      bits_per_word;
145         u32                     hz;
146 
147         if (t) {
148                 bits_per_word = t->bits_per_word;
149                 hz = t->speed_hz;
150         } else {
151                 bits_per_word = 0;
152                 hz = 0;
153         }
154 
155         /* spi_transfer level calls that work per-word */
156         if (!bits_per_word)
157                 bits_per_word = spi->bits_per_word;
158         if (bits_per_word <= 8)
159                 cs->txrx_bufs = bitbang_txrx_8;
160         else if (bits_per_word <= 16)
161                 cs->txrx_bufs = bitbang_txrx_16;
162         else if (bits_per_word <= 32)
163                 cs->txrx_bufs = bitbang_txrx_32;
164         else
165                 return -EINVAL;
166 
167         /* nsecs = (clock period)/2 */
168         if (!hz)
169                 hz = spi->max_speed_hz;
170         if (hz) {
171                 cs->nsecs = (1000000000/2) / hz;
172                 if (cs->nsecs > (MAX_UDELAY_MS * 1000 * 1000))
173                         return -EINVAL;
174         }
175 
176         return 0;
177 }
178 EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer);
179 
180 /**
181  * spi_bitbang_setup - default setup for per-word I/O loops
182  */
183 int spi_bitbang_setup(struct spi_device *spi)
184 {
185         struct spi_bitbang_cs   *cs = spi->controller_state;
186         struct spi_bitbang      *bitbang;
187         int                     retval;
188 
189         bitbang = spi_master_get_devdata(spi->master);
190 
191         /* REVISIT: some systems will want to support devices using lsb-first
192          * bit encodings on the wire.  In pure software that would be trivial,
193          * just bitbang_txrx_le_cphaX() routines shifting the other way, and
194          * some hardware controllers also have this support.
195          */
196         if ((spi->mode & SPI_LSB_FIRST) != 0)
197                 return -EINVAL;
198 
199         if (!cs) {
200                 cs = kzalloc(sizeof *cs, SLAB_KERNEL);
201                 if (!cs)
202                         return -ENOMEM;
203                 spi->controller_state = cs;
204         }
205 
206         if (!spi->bits_per_word)
207                 spi->bits_per_word = 8;
208 
209         /* per-word shift register access, in hardware or bitbanging */
210         cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)];
211         if (!cs->txrx_word)
212                 return -EINVAL;
213 
214         retval = spi_bitbang_setup_transfer(spi, NULL);
215         if (retval < 0)
216                 return retval;
217 
218         dev_dbg(&spi->dev, "%s, mode %d, %u bits/w, %u nsec/bit\n",
219                         __FUNCTION__, spi->mode & (SPI_CPOL | SPI_CPHA),
220                         spi->bits_per_word, 2 * cs->nsecs);
221 
222         /* NOTE we _need_ to call chipselect() early, ideally with adapter
223          * setup, unless the hardware defaults cooperate to avoid confusion
224          * between normal (active low) and inverted chipselects.
225          */
226 
227         /* deselect chip (low or high) */
228         spin_lock(&bitbang->lock);
229         if (!bitbang->busy) {
230                 bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
231                 ndelay(cs->nsecs);
232         }
233         spin_unlock(&bitbang->lock);
234 
235         return 0;
236 }
237 EXPORT_SYMBOL_GPL(spi_bitbang_setup);
238 
239 /**
240  * spi_bitbang_cleanup - default cleanup for per-word I/O loops
241  */
242 void spi_bitbang_cleanup(const struct spi_device *spi)
243 {
244         kfree(spi->controller_state);
245 }
246 EXPORT_SYMBOL_GPL(spi_bitbang_cleanup);
247 
248 static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t)
249 {
250         struct spi_bitbang_cs   *cs = spi->controller_state;
251         unsigned                nsecs = cs->nsecs;
252 
253         return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t);
254 }
255 
256 /*----------------------------------------------------------------------*/
257 
258 /*
259  * SECOND PART ... simple transfer queue runner.
260  *
261  * This costs a task context per controller, running the queue by
262  * performing each transfer in sequence.  Smarter hardware can queue
263  * several DMA transfers at once, and process several controller queues
264  * in parallel; this driver doesn't match such hardware very well.
265  *
266  * Drivers can provide word-at-a-time i/o primitives, or provide
267  * transfer-at-a-time ones to leverage dma or fifo hardware.
268  */