alu.fit.eqn

alu算术逻辑运算单元 主要代码 运行环境为QU6.0

-- Copyright (C) 1991-2005 Altera Corporation
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-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
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-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--A1L372 is srl_r[6]~739 at LC5_B47
--operation mode is normal

A1L372 = b[0] & a[7] # !b[0] & (a[6]);

--A1L572 is srl_r[6]~748 at LC5_B47
--operation mode is normal

A1L572 = b[0] & a[7] # !b[0] & (a[6]);


--A1L482 is y~2425 at LC6_B43
--operation mode is normal

A1L482 = b[0] & a[5] # !b[0] & (a[4]);

--A1L313 is y~2454 at LC6_B43
--operation mode is normal

A1L313 = b[0] & a[5] # !b[0] & (a[4]);


--A1L582 is y~2426 at LC7_B43
--operation mode is normal

A1L582 = b[1] & A1L372 # !b[1] & (A1L482);

--A1L413 is y~2455 at LC7_B43
--operation mode is normal

A1L413 = b[1] & A1L372 # !b[1] & (A1L482);


--A1L682 is y~2427 at LC7_B38
--operation mode is normal

A1L682 = b[0] & a[3] # !b[0] & (a[2]);

--A1L513 is y~2456 at LC7_B38
--operation mode is normal

A1L513 = b[0] & a[3] # !b[0] & (a[2]);


--A1L782 is y~2428 at LC6_B47
--operation mode is normal

A1L782 = b[0] & a[1] # !b[0] & (a[0]);

--A1L613 is y~2457 at LC6_B47
--operation mode is normal

A1L613 = b[0] & a[1] # !b[0] & (a[0]);


--A1L882 is y~2429 at LC4_B47
--operation mode is normal

A1L882 = b[1] & A1L682 # !b[1] & (A1L782);

--A1L713 is y~2458 at LC4_B47
--operation mode is normal

A1L713 = b[1] & A1L682 # !b[1] & (A1L782);


--A1L73 is Mux~4905 at LC1_B27
--operation mode is normal

A1L73 = b[2] & A1L582 # !b[2] & (A1L882);

--A1L401 is Mux~4990 at LC1_B27
--operation mode is normal

A1L401 = b[2] & A1L582 # !b[2] & (A1L882);


--A1L83 is Mux~4906 at LC1_B28
--operation mode is normal

A1L83 = op[1] # !b[2] & !b[1] & !b[0];

--A1L501 is Mux~4991 at LC1_B28
--operation mode is normal

A1L501 = op[1] # !b[2] & !b[1] & !b[0];


--A1L93 is Mux~4907 at LC2_B27
--operation mode is normal

A1L93 = op[0] & A1L73 # !op[0] & (A1L83 & a[0]);

--A1L601 is Mux~4992 at LC2_B27
--operation mode is normal

A1L601 = op[0] & A1L73 # !op[0] & (A1L83 & a[0]);


--A1L04 is Mux~4908 at LC6_B27
--operation mode is normal

A1L04 = a[0] & (op[1] $ (op[0] # b[0])) # !a[0] & (op[0] & (b[0] # op[1]) # !op[0] & b[0] & op[1]);

--A1L701 is Mux~4993 at LC6_B27
--operation mode is normal

A1L701 = a[0] & (op[1] $ (op[0] # b[0])) # !a[0] & (op[0] & (b[0] # op[1]) # !op[0] & b[0] & op[1]);


--E3_cs_buffer[0] is lpm_add_sub:ALU_ADDER|addcore:adder|a_csnbuffer:result_node|cs_buffer[0] at LC5_B32
--operation mode is arithmetic

E3_cs_buffer[0] = A1L01 $ a[0] $ C1_cin_node;

--E3L21 is lpm_add_sub:ALU_ADDER|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~164 at LC5_B32
--operation mode is arithmetic

E3L21 = A1L01 $ a[0] $ C1_cin_node;

--E3_cout[0] is lpm_add_sub:ALU_ADDER|addcore:adder|a_csnbuffer:result_node|cout[0] at LC5_B32
--operation mode is arithmetic

E3_cout[0] = CARRY(A1L01 & a[0] & C1_cin_node # !A1L01 & (a[0] # C1_cin_node));


--A1L14 is Mux~4909 at LC7_B27
--operation mode is normal

A1L14 = op[3] & (op[2]) # !op[3] & (op[2] & A1L04 # !op[2] & (!E3_cs_buffer[0]));

--A1L801 is Mux~4994 at LC7_B27
--operation mode is normal

A1L801 = op[3] & (op[2]) # !op[3] & (op[2] & A1L04 # !op[2] & (!E3_cs_buffer[0]));


--A1L24 is Mux~4911 at LC5_B27
--operation mode is normal

A1L24 = op[3] & (A1L14 & (!A1L101) # !A1L14 & A1L93) # !op[3] & (A1L14);

--A1L901 is Mux~4995 at LC5_B27
--operation mode is normal

A1L901 = op[3] & (A1L14 & (!A1L101) # !A1L14 & A1L93) # !op[3] & (A1L14);


--A1L34 is Mux~4912 at LC1_B36
--operation mode is normal

A1L34 = op[1] & (a[1] $ (b[1] # op[0])) # !op[1] & (b[1] & (a[1] # op[0]) # !b[1] & a[1] & op[0]);

--A1L011 is Mux~4996 at LC1_B36
--operation mode is normal

A1L011 = op[1] & (a[1] $ (b[1] # op[0])) # !op[1] & (b[1] & (a[1] # op[0]) # !b[1] & a[1] & op[0]);


--A1L982 is y~2430 at LC5_B51
--operation mode is normal

A1L982 = b[1] # b[0];

--A1L813 is y~2459 at LC5_B51
--operation mode is normal

A1L813 = b[1] # b[0];


--A1L502 is sla_r[1]~831 at LC4_B51
--operation mode is normal

A1L502 = b[2] & a[0] # !b[2] & (A1L982 & a[0] # !A1L982 & (a[1]));

--A1L602 is sla_r[1]~841 at LC4_B51
--operation mode is normal

A1L602 = b[2] & a[0] # !b[2] & (A1L982 & a[0] # !A1L982 & (a[1]));


--A1L092 is y~2431 at LC3_B35
--operation mode is normal

A1L092 = !b[1] & (b[0] & a[6] # !b[0] & (a[5]));

--A1L913 is y~2460 at LC3_B35
--operation mode is normal

A1L913 = !b[1] & (b[0] & a[6] # !b[0] & (a[5]));


--A1L962 is srl_r[5]~740 at LC1_B44
--operation mode is normal

A1L962 = A1L092 # a[7] & b[1] & !b[0];

--A1L172 is srl_r[5]~749 at LC1_B44
--operation mode is normal

A1L172 = A1L092 # a[7] & b[1] & !b[0];


--A1L192 is y~2432 at LC6_B42
--operation mode is normal

A1L192 = b[0] & a[4] # !b[0] & (a[3]);

--A1L023 is y~2461 at LC6_B42
--operation mode is normal

A1L023 = b[0] & a[4] # !b[0] & (a[3]);


--A1L292 is y~2433 at LC7_B50
--operation mode is normal

A1L292 = b[0] & a[2] # !b[0] & (a[1]);

--A1L123 is y~2462 at LC7_B50
--operation mode is normal

A1L123 = b[0] & a[2] # !b[0] & (a[1]);


--A1L392 is y~2434 at LC3_B50
--operation mode is normal

A1L392 = b[1] & A1L192 # !b[1] & (A1L292);

--A1L223 is y~2463 at LC3_B50
--operation mode is normal

A1L223 = b[1] & A1L192 # !b[1] & (A1L292);


--A1L952 is srl_r[1]~741 at LC2_B44
--operation mode is normal

A1L952 = b[2] & A1L962 # !b[2] & (A1L392);

--A1L062 is srl_r[1]~750 at LC2_B44
--operation mode is normal

A1L062 = b[2] & A1L962 # !b[2] & (A1L392);


--A1L702 is sla_r[2]~832 at LC4_B43
--operation mode is normal

A1L702 = b[2] # b[1];

--A1L012 is sla_r[2]~842 at LC4_B43
--operation mode is normal

A1L012 = b[2] # b[1];


--A1L522 is sll_r[1]~497 at LC5_B44
--operation mode is normal

A1L522 = !A1L702 & (b[0] & a[0] # !b[0] & (a[1]));

--A1L622 is sll_r[1]~505 at LC5_B44
--operation mode is normal

A1L622 = !A1L702 & (b[0] & a[0] # !b[0] & (a[1]));


--A1L44 is Mux~4913 at LC6_B44
--operation mode is normal

A1L44 = op[1] & (op[0]) # !op[1] & (op[0] & A1L952 # !op[0] & (A1L522));

--A1L111 is Mux~4997 at LC6_B44
--operation mode is normal

A1L111 = op[1] & (op[0]) # !op[1] & (op[0] & A1L952 # !op[0] & (A1L522));


--A1L142 is sra_r[1]~577 at LC8_B43
--operation mode is normal

A1L142 = A1L092 # b[1] & a[7];

--A1L342 is sra_r[1]~586 at LC8_B43
--operation mode is normal

A1L342 = A1L092 # b[1] & a[7];


--A1L242 is sra_r[1]~578 at LC3_B43
--operation mode is normal

A1L242 = b[2] & A1L142 # !b[2] & (A1L392);

--A1L442 is sra_r[1]~587 at LC3_B43
--operation mode is normal

A1L442 = b[2] & A1L142 # !b[2] & (A1L392);


--A1L54 is Mux~4914 at LC5_B36
--operation mode is normal

A1L54 = op[1] & (A1L44 & (A1L242) # !A1L44 & A1L502) # !op[1] & (A1L44);

--A1L211 is Mux~4998 at LC5_B36
--operation mode is normal

A1L211 = op[1] & (A1L44 & (A1L242) # !A1L44 & A1L502) # !op[1] & (A1L44);


--E3_cs_buffer[1] is lpm_add_sub:ALU_ADDER|addcore:adder|a_csnbuffer:result_node|cs_buffer[1] at LC6_B32
--operation mode is arithmetic

E3_cs_buffer[1] = a[1] $ A1L21 $ E3_cout[0];

--E3L41 is lpm_add_sub:ALU_ADDER|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~165 at LC6_B32
--operation mode is arithmetic

E3L41 = a[1] $ A1L21 $ E3_cout[0];

--E3_cout[1] is lpm_add_sub:ALU_ADDER|addcore:adder|a_csnbuffer:result_node|cout[1] at LC6_B32
--operation mode is arithmetic

E3_cout[1] = CARRY(a[1] & (E3_cout[0] # !A1L21) # !a[1] & !A1L21 & E3_cout[0]);


--A1L64 is Mux~4915 at LC6_B36
--operation mode is normal

A1L64 = op[2] & (op[3]) # !op[2] & (op[3] & A1L54 # !op[3] & (!E3_cs_buffer[1]));

--A1L311 is Mux~4999 at LC6_B36
--operation mode is normal

A1L311 = op[2] & (op[3]) # !op[2] & (op[3] & A1L54 # !op[3] & (!E3_cs_buffer[1]));


--A1L492 is y~2435 at LC8_B44
--operation mode is normal

A1L492 = b[1] & (b[0] & a[0] # !b[0] & (a[7]));

--A1L323 is y~2464 at LC8_B44
--operation mode is normal

A1L323 = b[1] & (b[0] & a[0] # !b[0] & (a[7]));


--A1L74 is Mux~4916 at LC7_B44
--operation mode is normal

A1L74 = b[2] & (A1L092 # A1L492) # !b[2] & A1L392;

--A1L411 is Mux~5000 at LC7_B44
--operation mode is normal

A1L411 = b[2] & (A1L092 # A1L492) # !b[2] & A1L392;


--A1L592 is y~2436 at LC5_B38
--operation mode is normal

A1L592 = b[0] & a[2] # !b[0] & (a[3]);

--A1L423 is y~2465 at LC5_B38
--operation mode is normal

A1L423 = b[0] & a[2] # !b[0] & (a[3]);


--A1L692 is y~2437 at LC2_B35
--operation mode is normal

A1L692 = b[0] & a[4] # !b[0] & (a[5]);

--A1L523 is y~2466 at LC2_B35
--operation mode is normal

A1L523 = b[0] & a[4] # !b[0] & (a[5]);


--A1L792 is y~2438 at LC4_B35
--operation mode is normal

A1L792 = b[1] & A1L592 # !b[1] & (A1L692);

--A1L623 is y~2467 at LC4_B35
--operation mode is normal

A1L623 = b[1] & A1L592 # !b[1] & (A1L692);


--A1L892 is y~2439 at LC1_B35
--operation mode is normal

A1L892 = b[0] & a[6] # !b[0] & (a[7]);

--A1L723 is y~2468 at LC1_B35
--operation mode is normal

A1L723 = b[0] & a[6] # !b[0] & (a[7]);


--A1L332 is sll_r[5]~498 at LC1_B26
--operation mode is normal

A1L332 = b[0] & a[0] # !b[0] & (a[1]);

--A1L532 is sll_r[5]~506 at LC1_B26
--operation mode is normal

A1L532 = b[0] & a[0] # !b[0] & (a[1]);


--A1L992 is y~2440 at LC8_B35
--operation mode is normal

A1L992 = b[1] & A1L892 # !b[1] & (A1L332);

--A1L823 is y~2469 at LC8_B35
--operation mode is normal

A1L823 = b[1] & A1L892 # !b[1] & (A1L332);


--A1L84 is Mux~4917 at LC7_B35
--operation mode is normal

A1L84 = b[2] & A1L792 # !b[2] & (A1L992);

--A1L511 is Mux~5001 at LC7_B35
--operation mode is normal

A1L511 = b[2] & A1L792 # !b[2] & (A1L992);


--A1L94 is Mux~4918 at LC8_B36
--operation mode is normal

A1L94 = op[1] & (!op[0]) # !op[1] & (op[0] & A1L74 # !op[0] & (A1L84));

--A1L611 is Mux~5002 at LC8_B36
--operation mode is normal

A1L611 = op[1] & (!op[0]) # !op[1] & (op[0] & A1L74 # !op[0] & (A1L84));


--A1L05 is Mux~4919 at LC4_B36
--operation mode is normal

A1L05 = op[2] & (A1L64 & (A1L94) # !A1L64 & A1L34) # !op[2] & (A1L64);

--A1L711 is Mux~5003 at LC4_B36
--operation mode is normal

A1L711 = op[2] & (A1L64 & (A1L94) # !A1L64 & A1L34) # !op[2] & (A1L64);


--A1L802 is sla_r[2]~833 at LC6_B38
--operation mode is normal

A1L802 = b[0] & a[1] # !b[0] & (a[2]);

--A1L112 is sla_r[2]~843 at LC6_B38
--operation mode is normal

A1L112 = b[0] & a[1] # !b[0] & (a[2]);


--A1L902 is sla_r[2]~834 at LC1_B48
--operation mode is normal

A1L902 = b[2] & a[0] # !b[2] & (b[1] & a[0] # !b[1] & (A1L802));

--A1L212 is sla_r[2]~844 at LC1_B48
--operation mode is normal

A1L212 = b[2] & a[0] # !b[2] & (b[1] & a[0] # !b[1] & (A1L802));


--A1L003 is y~2441 at LC5_B43
--operation mode is normal

A1L003 = b[1] & A1L482 # !b[1] & (A1L682);

--A1L923 is y~2470 at LC5_B43
--operation mode is normal

A1L923 = b[1] & A1L482 # !b[1] & (A1L682);


--A1L162 is srl_r[2]~742 at LC2_B48
--operation mode is normal

A1L162 = b[2] & (A1L372 & !b[1]) # !b[2] & A1L003;

--A1L262 is srl_r[2]~751 at LC2_B48
--operation mode is normal

A1L262 = b[2] & (A1L372 & !b[1]) # !b[2] & A1L003;