alu.tan.rpt

alu算术逻辑运算单元 主要代码 运行环境为QU6.0

Timing Analyzer report for alu
Tue Aug 23 16:27:07 2005
Version 5.0 Build 148 04/26/2005 SJ Full Version


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Timing Analyzer Summary
  3. Timing Analyzer Settings
  4. tpd
  5. Minimum tpd
  6. Timing Analyzer Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2005 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic       
functions, and any output files any of the foregoing           
(including device programming or simulation files), and any    
associated documentation or information are expressly subject  
to the terms and conditions of the Altera Program License      
Subscription Agreement, Altera MegaCore Function License       
Agreement, or other applicable license agreement, including,   
without limitation, that your use is for the sole purpose of   
programming logic devices manufactured by Altera and sold by   
Altera or its authorized distributors.  Please refer to the    
applicable agreement for further details.



+-----------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Summary                                                                                               ;
+------------------------------+-------+---------------+-------------+------+----+------------+----------+--------------+
; Type                         ; Slack ; Required Time ; Actual Time ; From ; To ; From Clock ; To Clock ; Failed Paths ;
+------------------------------+-------+---------------+-------------+------+----+------------+----------+--------------+
; Worst-case tpd               ; N/A   ; None          ; 44.800 ns   ; b[0] ; z  ;            ;          ; 0            ;
; Worst-case Minimum tpd       ; N/A   ; None          ; 18.800 ns   ; a[7] ; v  ;            ;          ; 0            ;
; Total number of failed paths ;       ;               ;             ;      ;    ;            ;          ; 0            ;
+------------------------------+-------+---------------+-------------+------+----+------------+----------+--------------+


+------------------------------------------------------------------------------------------------------+
; Timing Analyzer Settings                                                                             ;
+-------------------------------------------------------+--------------------+------+----+-------------+
; Option                                                ; Setting            ; From ; To ; Entity Name ;
+-------------------------------------------------------+--------------------+------+----+-------------+
; Device Name                                           ; EP1K100QC208-3     ;      ;    ;             ;
; Timing Models                                         ; Final              ;      ;    ;             ;
; Number of source nodes to report per destination node ; 10                 ;      ;    ;             ;
; Number of destination nodes to report                 ; 10                 ;      ;    ;             ;
; Number of paths to report                             ; 200                ;      ;    ;             ;
; Report Minimum Timing Checks                          ; On                 ;      ;    ;             ;
; Use Fast Timing Models                                ; Off                ;      ;    ;             ;
; Report IO Paths Separately                            ; Off                ;      ;    ;             ;
; Default hold multicycle                               ; Same as Multicycle ;      ;    ;             ;
; Cut paths between unrelated clock domains             ; On                 ;      ;    ;             ;
; Cut off read during write signal paths                ; On                 ;      ;    ;             ;
; Cut off feedback from I/O pins                        ; On                 ;      ;    ;             ;
; Report Combined Fast/Slow Timing                      ; Off                ;      ;    ;             ;
; Ignore Clock Settings                                 ; Off                ;      ;    ;             ;
; Analyze latches as synchronous elements               ; Off                ;      ;    ;             ;
; Enable Recovery/Removal analysis                      ; Off                ;      ;    ;             ;
; Enable Clock Latency                                  ; Off                ;      ;    ;             ;
+-------------------------------------------------------+--------------------+------+----+-------------+


+-------------------------------------------------------------------------------------------------------------------------------------+
; tpd                                                                                                                                 ;
+-----------------------------------------+-----------------------------------------------------+-----------------+-------+-----------+
; Slack                                   ; Required P2P Time                                   ; Actual P2P Time ; From  ; To        ;
+-----------------------------------------+-----------------------------------------------------+-----------------+-------+-----------+
; N/A                                     ; None                                                ; 44.800 ns       ; b[0]  ; z         ;
; N/A                                     ; None                                                ; 43.200 ns       ; a[6]  ; z         ;
; N/A                                     ; None                                                ; 43.200 ns       ; a[5]  ; z         ;
; N/A                                     ; None                                                ; 42.900 ns       ; a[4]  ; z         ;
; N/A                                     ; None                                                ; 42.700 ns       ; b[1]  ; z         ;
; N/A                                     ; None                                                ; 42.600 ns       ; a[2]  ; z         ;
; N/A                                     ; None                                                ; 42.100 ns       ; b[0]  ; result[3] ;
; N/A                                     ; None                                                ; 41.900 ns       ; a[3]  ; z         ;
; N/A                                     ; None                                                ; 40.500 ns       ; a[6]  ; result[3] ;
; N/A                                     ; None                                                ; 40.500 ns       ; a[5]  ; result[3] ;
; N/A                                     ; None                                                ; 40.400 ns       ; a[1]  ; z         ;
; N/A                                     ; None                                                ; 40.200 ns       ; a[4]  ; result[3] ;
; N/A                                     ; None                                                ; 40.000 ns       ; a[4]  ; result[1] ;
; N/A                                     ; None                                                ; 39.800 ns       ; op[3] ; z         ;
; N/A                                     ; None                                                ; 39.600 ns       ; op[1] ; z         ;
; N/A                                     ; None                                                ; 39.600 ns       ; op[2] ; z         ;
; N/A                                     ; None                                                ; 39.500 ns       ; b[0]  ; result[1] ;
; N/A                                     ; None                                                ; 39.300 ns       ; op[0] ; z         ;
; N/A                                     ; None                                                ; 39.300 ns       ; b[1]  ; result[1] ;
; N/A                                     ; None                                                ; 39.200 ns       ; a[3]  ; result[3] ;
; N/A                                     ; None                                                ; 39.000 ns       ; a[3]  ; result[1] ;
; N/A                                     ; None                                                ; 38.900 ns       ; a[0]  ; z         ;
; N/A                                     ; None                                                ; 38.700 ns       ; b[0]  ; n         ;
; N/A                                     ; None                                                ; 38.500 ns       ; b[1]  ; result[5] ;
; N/A                                     ; None                                                ; 38.400 ns       ; b[0]  ; result[5] ;
; N/A                                     ; None                                                ; 38.400 ns       ; a[2]  ; result[5] ;
; N/A                                     ; None                                                ; 38.300 ns       ; a[2]  ; result[1] ;
; N/A                                     ; None                                                ; 38.300 ns       ; a[1]  ; result[1] ;
; N/A                                     ; None                                                ; 38.200 ns       ; a[7]  ; z         ;