📄 app 24fj256gb110 ivt remap.gld
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/*
** Linker script outline for PIC24F bootloader user application
** (for PIC24FJ256GB110 device)
*/
OUTPUT_ARCH("24FJ256GB110")
EXTERN(__resetPRI)
EXTERN(__resetALT)
/*
** Memory Regions
*/
MEMORY
{
data (a!xr) : ORIGIN = 0x800, LENGTH = 0x4000
/*
**Removed reset & interrupt vectors because they are remapped
*/
/*
reset : ORIGIN = 0x0, LENGTH = 0x4
ivt : ORIGIN = 0x4, LENGTH = 0xFC
aivt : ORIGIN = 0x104, LENGTH = 0xFC
*/
/*Starting location and length of user program */
program (xr) : ORIGIN = 0xC00, LENGTH = 0x29FFA
config3 : ORIGIN = 0x2ABFA, LENGTH = 0x2
config2 : ORIGIN = 0x2ABFC, LENGTH = 0x2
config1 : ORIGIN = 0x2ABFE, LENGTH = 0x2
/*
** Section for storing user app reset vector and BL time out value. This
** section must be defined to allow use of the two location at address
** 0x100 (the bootloader's default setting).
** This is not needed if these values are placed in addresses in
** the "program" section.
*/
BLreset : ORIGIN = 0x100, LENGTH = 0x4
}
__CONFIG3 = 0x2ABFA;
__CONFIG2 = 0x2ABFC;
__CONFIG1 = 0x2ABFE;
__IVT_BASE = 0x4;
__AIVT_BASE = 0x104;
__DATA_BASE = 0x800;
__CODE_BASE = 0xC00; /* starting location of user application */
/*
** ==================== Section Map ======================
*/
SECTIONS
{
/*
** ========== Program Memory ==========
*/
/*
** Reset Instruction
*/
/* REMOVED FOR VECTOR REMAPPING */
/*
** Interrupt Vector Tables
**
** The primary and alternate tables are loaded
** here, between sections .reset and .text.
** Vector table source code appears below.
*/
/*
** Outputs the BLreset section into the hex file at the area specified in
** memory map above. This is where the bootloader, by default, stores its
** user reset and entry mode timer. This is not needed if these values
** are placed in addresses in the "program" section.
*/
.BLreset :
{
*(.BLreset);
} >BLreset
/*
** User Code and Library Code
**
** This section must not be assigned to __CODE_BASE,
** because CodeGuard(tm) sections may be located there.
*/
.text :
{
*(.init);
*(.handle);
*(.libc) *(.libm) *(.libdsp); /* keep together in this order */
*(.lib*);
*(.text);
} >program
/*
** Configuration Words
*/
__CONFIG3 :
{ *(__CONFIG3.sec) } >config3
__CONFIG2 :
{ *(__CONFIG2.sec) } >config2
__CONFIG1 :
{ *(__CONFIG1.sec) } >config1
/*
** =========== Data Memory ===========
*/
/*
** ICD Debug Exec
**
** This section provides optional storage for
** the ICD2 debugger. Define a global symbol
** named __ICD2RAM to enable ICD2. This section
** must be loaded at data address 0x800.
*/
.icd __DATA_BASE (NOLOAD):
{
. += (DEFINED (__ICD2RAM) ? 0x50 : 0 );
} > data
/*
** Other sections in data memory are not explicitly mapped.
** Instead they are allocated according to their section
** attributes, which is most efficient.
**
** If a specific arrangement of sections is required
** (other than what can be achieved using attributes)
** additional sections may be defined here. See chapter
** 10.5 in the MPLAB ASM30/LINK30 User's Guide (DS51317)
** for more information.
*/
/*
** ========== Debug Info ==============
*/
.comment 0 : { *(.comment) }
/*
** DWARF-2
*/
.debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_ranges 0 : { *(.debug_ranges) }
.debug_aranges 0 : { *(.debug_aranges) }
} /* SECTIONS */
/*
** ================= End of Section Map ================
*/
/*
** Section Map for Interrupt Vector Tables
*/
SECTIONS
{
/*
** Interrupt Vector Table
*/
/* REMOVED FOR VECTOR REMAPPING */
/*
** Alternate Interrupt Vector Table
*/
/* REMOVED FOR VECTOR REMAPPING */
} /* SECTIONS */
/*
** ============== Equates for SFR Addresses =============
*/
WREG0 = 0x0;
_WREG0 = 0x0;
WREG1 = 0x2;
_WREG1 = 0x2;
WREG2 = 0x4;
_WREG2 = 0x4;
WREG3 = 0x6;
_WREG3 = 0x6;
WREG4 = 0x8;
_WREG4 = 0x8;
WREG5 = 0xA;
_WREG5 = 0xA;
WREG6 = 0xC;
_WREG6 = 0xC;
WREG7 = 0xE;
_WREG7 = 0xE;
WREG8 = 0x10;
_WREG8 = 0x10;
WREG9 = 0x12;
_WREG9 = 0x12;
WREG10 = 0x14;
_WREG10 = 0x14;
WREG11 = 0x16;
_WREG11 = 0x16;
WREG12 = 0x18;
_WREG12 = 0x18;
WREG13 = 0x1A;
_WREG13 = 0x1A;
WREG14 = 0x1C;
_WREG14 = 0x1C;
WREG15 = 0x1E;
_WREG15 = 0x1E;
SPLIM = 0x20;
_SPLIM = 0x20;
PCL = 0x2E;
_PCL = 0x2E;
PCH = 0x30;
_PCH = 0x30;
TBLPAG = 0x32;
_TBLPAG = 0x32;
PSVPAG = 0x34;
_PSVPAG = 0x34;
RCOUNT = 0x36;
_RCOUNT = 0x36;
SR = 0x42;
_SR = 0x42;
_SRbits = 0x42;
CORCON = 0x44;
_CORCON = 0x44;
_CORCONbits = 0x44;
DISICNT = 0x52;
_DISICNT = 0x52;
CNPD1 = 0x54;
_CNPD1 = 0x54;
_CNPD1bits = 0x54;
CNPD2 = 0x56;
_CNPD2 = 0x56;
_CNPD2bits = 0x56;
CNPD3 = 0x58;
_CNPD3 = 0x58;
_CNPD3bits = 0x58;
CNPD4 = 0x5A;
_CNPD4 = 0x5A;
_CNPD4bits = 0x5A;
CNPD5 = 0x5C;
_CNPD5 = 0x5C;
_CNPD5bits = 0x5C;
CNPD6 = 0x5E;
_CNPD6 = 0x5E;
_CNPD6bits = 0x5E;
CNEN1 = 0x60;
_CNEN1 = 0x60;
_CNEN1bits = 0x60;
CNEN2 = 0x62;
_CNEN2 = 0x62;
_CNEN2bits = 0x62;
CNEN3 = 0x64;
_CNEN3 = 0x64;
_CNEN3bits = 0x64;
CNEN4 = 0x66;
_CNEN4 = 0x66;
_CNEN4bits = 0x66;
CNEN5 = 0x68;
_CNEN5 = 0x68;
_CNEN5bits = 0x68;
CNEN6 = 0x6A;
_CNEN6 = 0x6A;
_CNEN6bits = 0x6A;
CNPU1 = 0x6C;
_CNPU1 = 0x6C;
_CNPU1bits = 0x6C;
CNPU2 = 0x6E;
_CNPU2 = 0x6E;
_CNPU2bits = 0x6E;
CNPU3 = 0x70;
_CNPU3 = 0x70;
_CNPU3bits = 0x70;
CNPU4 = 0x72;
_CNPU4 = 0x72;
_CNPU4bits = 0x72;
CNPU5 = 0x74;
_CNPU5 = 0x74;
_CNPU5bits = 0x74;
CNPU6 = 0x76;
_CNPU6 = 0x76;
_CNPU6bits = 0x76;
INTCON1 = 0x80;
_INTCON1 = 0x80;
_INTCON1bits = 0x80;
INTCON2 = 0x82;
_INTCON2 = 0x82;
_INTCON2bits = 0x82;
IFS0 = 0x84;
_IFS0 = 0x84;
_IFS0bits = 0x84;
IFS1 = 0x86;
_IFS1 = 0x86;
_IFS1bits = 0x86;
IFS2 = 0x88;
_IFS2 = 0x88;
_IFS2bits = 0x88;
IFS3 = 0x8A;
_IFS3 = 0x8A;
_IFS3bits = 0x8A;
IFS4 = 0x8C;
_IFS4 = 0x8C;
_IFS4bits = 0x8C;
IFS5 = 0x8E;
_IFS5 = 0x8E;
_IFS5bits = 0x8E;
IEC0 = 0x94;
_IEC0 = 0x94;
_IEC0bits = 0x94;
IEC1 = 0x96;
_IEC1 = 0x96;
_IEC1bits = 0x96;
IEC2 = 0x98;
_IEC2 = 0x98;
_IEC2bits = 0x98;
IEC3 = 0x9A;
_IEC3 = 0x9A;
_IEC3bits = 0x9A;
IEC4 = 0x9C;
_IEC4 = 0x9C;
_IEC4bits = 0x9C;
IEC5 = 0x9E;
_IEC5 = 0x9E;
_IEC5bits = 0x9E;
IPC0 = 0xA4;
_IPC0 = 0xA4;
_IPC0bits = 0xA4;
IPC1 = 0xA6;
_IPC1 = 0xA6;
_IPC1bits = 0xA6;
IPC2 = 0xA8;
_IPC2 = 0xA8;
_IPC2bits = 0xA8;
IPC3 = 0xAA;
_IPC3 = 0xAA;
_IPC3bits = 0xAA;
IPC4 = 0xAC;
_IPC4 = 0xAC;
_IPC4bits = 0xAC;
IPC5 = 0xAE;
_IPC5 = 0xAE;
_IPC5bits = 0xAE;
IPC6 = 0xB0;
_IPC6 = 0xB0;
_IPC6bits = 0xB0;
IPC7 = 0xB2;
_IPC7 = 0xB2;
_IPC7bits = 0xB2;
IPC8 = 0xB4;
_IPC8 = 0xB4;
_IPC8bits = 0xB4;
IPC9 = 0xB6;
_IPC9 = 0xB6;
_IPC9bits = 0xB6;
IPC10 = 0xB8;
_IPC10 = 0xB8;
_IPC10bits = 0xB8;
IPC11 = 0xBA;
_IPC11 = 0xBA;
_IPC11bits = 0xBA;
IPC12 = 0xBC;
_IPC12 = 0xBC;
_IPC12bits = 0xBC;
IPC13 = 0xBE;
_IPC13 = 0xBE;
_IPC13bits = 0xBE;
IPC15 = 0xC2;
_IPC15 = 0xC2;
_IPC15bits = 0xC2;
IPC16 = 0xC4;
_IPC16 = 0xC4;
_IPC16bits = 0xC4;
IPC18 = 0xC8;
_IPC18 = 0xC8;
_IPC18bits = 0xC8;
IPC19 = 0xCA;
_IPC19 = 0xCA;
_IPC19bits = 0xCA;
IPC20 = 0xCC;
_IPC20 = 0xCC;
_IPC20bits = 0xCC;
IPC21 = 0xCE;
_IPC21 = 0xCE;
_IPC21bits = 0xCE;
IPC22 = 0xD0;
_IPC22 = 0xD0;
_IPC22bits = 0xD0;
IPC23 = 0xD2;
_IPC23 = 0xD2;
_IPC23bits = 0xD2;
TMR1 = 0x100;
_TMR1 = 0x100;
PR1 = 0x102;
_PR1 = 0x102;
T1CON = 0x104;
_T1CON = 0x104;
_T1CONbits = 0x104;
TMR2 = 0x106;
_TMR2 = 0x106;
TMR3HLD = 0x108;
_TMR3HLD = 0x108;
TMR3 = 0x10A;
_TMR3 = 0x10A;
PR2 = 0x10C;
_PR2 = 0x10C;
PR3 = 0x10E;
_PR3 = 0x10E;
T2CON = 0x110;
_T2CON = 0x110;
_T2CONbits = 0x110;
T3CON = 0x112;
_T3CON = 0x112;
_T3CONbits = 0x112;
TMR4 = 0x114;
_TMR4 = 0x114;
TMR5HLD = 0x116;
_TMR5HLD = 0x116;
TMR5 = 0x118;
_TMR5 = 0x118;
PR4 = 0x11A;
_PR4 = 0x11A;
PR5 = 0x11C;
_PR5 = 0x11C;
T4CON = 0x11E;
_T4CON = 0x11E;
_T4CONbits = 0x11E;
T5CON = 0x120;
_T5CON = 0x120;
_T5CONbits = 0x120;
I2C3RCV = 0x130;
_I2C3RCV = 0x130;
I2C3TRN = 0x132;
_I2C3TRN = 0x132;
I2C3BRG = 0x134;
_I2C3BRG = 0x134;
I2C3CON = 0x136;
_I2C3CON = 0x136;
_I2C3CONbits = 0x136;
I2C3STAT = 0x138;
_I2C3STAT = 0x138;
_I2C3STATbits = 0x138;
I2C3ADD = 0x13A;
_I2C3ADD = 0x13A;
I2C3MSK = 0x13C;
_I2C3MSK = 0x13C;
IC1CON1 = 0x140;
_IC1CON1 = 0x140;
_IC1CON1bits = 0x140;
IC1CON2 = 0x142;
_IC1CON2 = 0x142;
_IC1CON2bits = 0x142;
IC1BUF = 0x144;
_IC1BUF = 0x144;
IC1TMR = 0x146;
_IC1TMR = 0x146;
IC2CON1 = 0x148;
_IC2CON1 = 0x148;
_IC2CON1bits = 0x148;
IC2CON2 = 0x14A;
_IC2CON2 = 0x14A;
_IC2CON2bits = 0x14A;
IC2BUF = 0x14C;
_IC2BUF = 0x14C;
IC2TMR = 0x14E;
_IC2TMR = 0x14E;
IC3CON1 = 0x150;
_IC3CON1 = 0x150;
_IC3CON1bits = 0x150;
IC3CON2 = 0x152;
_IC3CON2 = 0x152;
_IC3CON2bits = 0x152;
IC3BUF = 0x154;
_IC3BUF = 0x154;
IC3TMR = 0x156;
_IC3TMR = 0x156;
IC4CON1 = 0x158;
_IC4CON1 = 0x158;
_IC4CON1bits = 0x158;
IC4CON2 = 0x15A;
_IC4CON2 = 0x15A;
_IC4CON2bits = 0x15A;
IC4BUF = 0x15C;
_IC4BUF = 0x15C;
IC4TMR = 0x15E;
_IC4TMR = 0x15E;
IC5CON1 = 0x160;
_IC5CON1 = 0x160;
_IC5CON1bits = 0x160;
IC5CON2 = 0x162;
_IC5CON2 = 0x162;
_IC5CON2bits = 0x162;
IC5BUF = 0x164;
_IC5BUF = 0x164;
IC5TMR = 0x166;
_IC5TMR = 0x166;
IC6CON1 = 0x168;
_IC6CON1 = 0x168;
_IC6CON1bits = 0x168;
IC6CON2 = 0x16A;
_IC6CON2 = 0x16A;
_IC6CON2bits = 0x16A;
IC6BUF = 0x16C;
_IC6BUF = 0x16C;
IC6TMR = 0x16E;
_IC6TMR = 0x16E;
IC7CON1 = 0x170;
_IC7CON1 = 0x170;
_IC7CON1bits = 0x170;
IC7CON2 = 0x172;
_IC7CON2 = 0x172;
_IC7CON2bits = 0x172;
IC7BUF = 0x174;
_IC7BUF = 0x174;
IC7TMR = 0x176;
_IC7TMR = 0x176;
IC8CON1 = 0x178;
_IC8CON1 = 0x178;
_IC8CON1bits = 0x178;
IC8CON2 = 0x17A;
_IC8CON2 = 0x17A;
_IC8CON2bits = 0x17A;
IC8BUF = 0x17C;
_IC8BUF = 0x17C;
IC8TMR = 0x17E;
_IC8TMR = 0x17E;
IC9CON1 = 0x180;
_IC9CON1 = 0x180;
_IC9CON1bits = 0x180;
IC9CON2 = 0x182;
_IC9CON2 = 0x182;
_IC9CON2bits = 0x182;
IC9BUF = 0x184;
_IC9BUF = 0x184;
IC9TMR = 0x186;
_IC9TMR = 0x186;
OC1CON1 = 0x190;
_OC1CON1 = 0x190;
_OC1CON1bits = 0x190;
OC1CON2 = 0x192;
_OC1CON2 = 0x192;
_OC1CON2bits = 0x192;
OC1RS = 0x194;
_OC1RS = 0x194;
OC1R = 0x196;
_OC1R = 0x196;
OC1TMR = 0x198;
_OC1TMR = 0x198;
OC2CON1 = 0x19A;
_OC2CON1 = 0x19A;
_OC2CON1bits = 0x19A;
OC2CON2 = 0x19C;
_OC2CON2 = 0x19C;
_OC2CON2bits = 0x19C;
OC2RS = 0x19E;
_OC2RS = 0x19E;
OC2R = 0x1A0;
_OC2R = 0x1A0;
OC2TMR = 0x1A2;
_OC2TMR = 0x1A2;
OC3CON1 = 0x1A4;
_OC3CON1 = 0x1A4;
_OC3CON1bits = 0x1A4;
OC3CON2 = 0x1A6;
_OC3CON2 = 0x1A6;
_OC3CON2bits = 0x1A6;
OC3RS = 0x1A8;
_OC3RS = 0x1A8;
OC3R = 0x1AA;
_OC3R = 0x1AA;
OC3TMR = 0x1AC;
_OC3TMR = 0x1AC;
OC4CON1 = 0x1AE;
_OC4CON1 = 0x1AE;
_OC4CON1bits = 0x1AE;
OC4CON2 = 0x1B0;
_OC4CON2 = 0x1B0;
_OC4CON2bits = 0x1B0;
OC4RS = 0x1B2;
_OC4RS = 0x1B2;
OC4R = 0x1B4;
_OC4R = 0x1B4;
OC4TMR = 0x1B6;
_OC4TMR = 0x1B6;
OC5CON1 = 0x1B8;
_OC5CON1 = 0x1B8;
_OC5CON1bits = 0x1B8;
OC5CON2 = 0x1BA;
_OC5CON2 = 0x1BA;
_OC5CON2bits = 0x1BA;
OC5RS = 0x1BC;
_OC5RS = 0x1BC;
OC5R = 0x1BE;
_OC5R = 0x1BE;
OC5TMR = 0x1C0;
_OC5TMR = 0x1C0;
OC6CON1 = 0x1C2;
_OC6CON1 = 0x1C2;
_OC6CON1bits = 0x1C2;
OC6CON2 = 0x1C4;
_OC6CON2 = 0x1C4;
_OC6CON2bits = 0x1C4;
OC6RS = 0x1C6;
_OC6RS = 0x1C6;
OC6R = 0x1C8;
_OC6R = 0x1C8;
OC6TMR = 0x1CA;
_OC6TMR = 0x1CA;
OC7CON1 = 0x1CC;
_OC7CON1 = 0x1CC;
_OC7CON1bits = 0x1CC;
OC7CON2 = 0x1CE;
_OC7CON2 = 0x1CE;
_OC7CON2bits = 0x1CE;
OC7RS = 0x1D0;
_OC7RS = 0x1D0;
OC7R = 0x1D2;
_OC7R = 0x1D2;
OC7TMR = 0x1D4;
_OC7TMR = 0x1D4;
OC8CON1 = 0x1D6;
_OC8CON1 = 0x1D6;
_OC8CON1bits = 0x1D6;
OC8CON2 = 0x1D8;
_OC8CON2 = 0x1D8;
_OC8CON2bits = 0x1D8;
OC8RS = 0x1DA;
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