vgarom.hif

基于fpga和sopc的用VHDL语言编写的EDA的VGA图像显示控制器

	}
}
TREE
{
	vgarom::(0,0):(0): vgarom.vhd
	{
		lpm_add_sub:40:(63,25):(245): lpm_add_sub.tdf
		{
			addcore:54:(212,4):(64,adder): addcore.tdf;
			altshift:3:(222,2):(101,result_ext_latency_ffs): altshift.tdf;
			altshift:4:(224,2):(127,carry_ext_latency_ffs): altshift.tdf;
			altshift:4:(226,2):(135,oflow_ext_latency_ffs): altshift.tdf;
		}
		lpm_add_sub:55:(83,17):(655): lpm_add_sub.tdf
		{
			addcore:56:(212,4):(61,adder): addcore.tdf;
			altshift:33:(222,2):(95,result_ext_latency_ffs): altshift.tdf;
			altshift:4:(224,2):(119,carry_ext_latency_ffs): altshift.tdf;
			altshift:4:(226,2):(127,oflow_ext_latency_ffs): altshift.tdf;
		}
		lpm_mult:57:(98,1):(1176): lpm_mult.tdf
		{
			multcore:58:(250,5):(67,mult_core): multcore.tdf
			{
				csa_add:36:(207,6):(66,padder): csa_add.tdf
				{
					csa_cell:37:(57,11):(134,adder0): csa_cell.tdf;
					lpm_add_sub:59:(66,3):(241,cpa_adder): lpm_add_sub.tdf
					{
						addcore:60:(212,4):(100,adder): addcore.tdf;
						altshift:30:(222,2):(173,result_ext_latency_ffs): altshift.tdf;
						altshift:4:(224,2):(223,carry_ext_latency_ffs): altshift.tdf;
						altshift:4:(226,2):(231,oflow_ext_latency_ffs): altshift.tdf;
					}
				}
			}
			altshift:21:(291,3):(116,external_latency_ffs): altshift.tdf;
		}
		lpm_add_sub:61:(98,1):(1186): lpm_add_sub.tdf
		{
			addcore:62:(212,4):(88,adder): addcore.tdf;
			altshift:21:(222,2):(149,result_ext_latency_ffs): altshift.tdf;
			altshift:4:(224,2):(191,carry_ext_latency_ffs): altshift.tdf;
			altshift:4:(226,2):(199,oflow_ext_latency_ffs): altshift.tdf;
		}
	}
}