testctl.sat

来自「基于fpga和sopc的用VHDL语言编写的EDA频率测试与FPGA单片机通讯」· SAT 代码 · 共 8 行

define_design_name {TESTCTL}
define_synthesis -family FLEX10K
define_synthesis -device {epf10k20tc144-3}
define_synthesis -style WYSIWYG
define_synthesis -inverter_push_back OFF
clear_auto_cliques
puts {All Constraints processed!}