reg32b.pin
来自「基于fpga和sopc的用VHDL语言编写的EDA频率测试与FPGA单片机通讯」· PIN 代码 · 共 177 行
PIN
177 行
-- Copyright (C) 1988-1999 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera. Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
N.C. = No Connect, This pin has no internal connection to the device.
VCCINT = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
VCCIO = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
GNDINT = Dedicated ground pin or unused dedicated input, which MUST be connected to GND.
GNDIO = Dedicated ground pin, which MUST be connected to GND.
RESERVED = Unused I/O pin, which MUST be left unconnected.
----------------------------------------------------------------------------
CHIP "reg32b" ASSIGNED TO AN EPF10K10TC144-3
TCK : 1
CONF_DONE : 2
nCEO : 3
TDO : 4
VCCIO : 5
VCCINT : 6
DIN23 : 7
DIN24 : 8
DIN25 : 9
DIN26 : 10
DIN27 : 11
DIN28 : 12
DIN29 : 13
DIN15 : 14
GNDIO : 15
GNDINT : 16
DIN0 : 17
DOUT14 : 18
RESERVED : 19
DOUT0 : 20
RESERVED : 21
RESERVED : 22
RESERVED : 23
VCCIO : 24
VCCINT : 25
DOUT13 : 26
DOUT15 : 27
RESERVED : 28
RESERVED : 29
RESERVED : 30
RESERVED : 31
RESERVED : 32
RESERVED : 33
TMS : 34
nSTATUS : 35
RESERVED : 36
RESERVED : 37
RESERVED : 38
RESERVED : 39
GNDIO : 40
RESERVED : 41
RESERVED : 42
RESERVED : 43
RESERVED : 44
VCCIO : 45
RESERVED : 46
RESERVED : 47
RESERVED : 48
RESERVED : 49
GNDIO : 50
RESERVED : 51
VCCINT : 52
VCCINT : 53
DIN20 : 54
Load : 55
DIN21 : 56
GNDINT : 57
GNDINT : 58
RESERVED : 59
DOUT5 : 60
VCCIO : 61
DOUT11 : 62
DOUT9 : 63
DOUT1 : 64
DOUT2 : 65
GNDIO : 66
DOUT8 : 67
DOUT30 : 68
DOUT22 : 69
DIN9 : 70
VCCIO : 71
DIN14 : 72
DIN7 : 73
nCONFIG : 74
VCCINT : 75
MSEL1 : 76
MSEL0 : 77
DOUT7 : 78
DOUT16 : 79
DOUT31 : 80
DOUT21 : 81
DOUT26 : 82
DOUT24 : 83
GNDINT : 84
GNDIO : 85
DOUT12 : 86
DOUT6 : 87
DOUT29 : 88
DOUT28 : 89
DOUT27 : 90
DOUT20 : 91
DOUT19 : 92
VCCINT : 93
VCCIO : 94
DIN4 : 95
DIN16 : 96
DIN3 : 97
DIN2 : 98
DIN17 : 99
DIN31 : 100
DIN30 : 101
DIN1 : 102
GNDINT : 103
GNDIO : 104
TDI : 105
nCE : 106
DCLK : 107
DATA0 : 108
DIN12 : 109
DIN5 : 110
DIN6 : 111
DIN10 : 112
DIN11 : 113
DIN8 : 114
VCCIO : 115
DIN13 : 116
DOUT18 : 117
DOUT10 : 118
DOUT4 : 119
DOUT25 : 120
DOUT23 : 121
DOUT3 : 122
VCCINT : 123
DIN19 : 124
DIN22 : 125
DIN18 : 126
GNDINT : 127
DOUT17 : 128
GNDIO : 129
RESERVED : 130
RESERVED : 131
RESERVED : 132
RESERVED : 133
VCCIO : 134
RESERVED : 135
RESERVED : 136
RESERVED : 137
RESERVED : 138
GNDIO : 139
RESERVED : 140
RESERVED : 141
RESERVED : 142
RESERVED : 143
RESERVED : 144
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