freqtest.hif

来自「基于fpga和sopc的用VHDL语言编写的EDA频率测试与FPGA单片机通讯」· HIF 代码 · 共 177 行

HIF003
--
-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
--
-- Warning: do not edit this file!
--
FILES
{
	altshift.tdf
	{
		altshift [USE_LPM_FOR_AHDL_OPERATORS,WIDTH=4,DEPTH=0] []
		{
			10 [DEPTH=0,WIDTH=5,USE_LPM_FOR_AHDL_OPERATORS=OFF] [result4,result3,result2,result1,result0,data4,data3,data2,data1,data0];
			8 [USE_LPM_FOR_AHDL_OPERATORS=OFF,WIDTH=1,DEPTH=0] [result0,data0];
			7 [USE_LPM_FOR_AHDL_OPERATORS=OFF,WIDTH=4,DEPTH=0] [result3,result2,result1,result0,data3,data2,data1,data0];
		}
	}
	addcore.tdf
	{
		addcore [USE_LPM_FOR_AHDL_OPERATORS,width,CONSTANT_CIN,CARRY_CHAIN,CARRY_CHAIN_LENGTH,DEVICE_FAMILY] [aglobal.inc,addcore.inc]
		{
			14 [DEVICE_FAMILY=FLEX10K,CARRY_CHAIN_LENGTH=32,CARRY_CHAIN=MANUAL,CONSTANT_CIN=0,width=5,USE_LPM_FOR_AHDL_OPERATORS=OFF] [result4,result3,result2,result1,result0,dataa4,dataa3,dataa2,dataa1,dataa0,datab4,datab3,datab2,datab1,datab0,cin];
			9 [DEVICE_FAMILY=ACEX1K,CARRY_CHAIN_LENGTH=32,CARRY_CHAIN=IGNORE,CONSTANT_CIN=0,width=5,USE_LPM_FOR_AHDL_OPERATORS=OFF] [result4,result3,result2,result1,result0,dataa4,dataa3,dataa2,dataa1,dataa0,datab4,datab3,datab2,datab1,datab0,cin];
			6 [DEVICE_FAMILY=FLEX10K,CARRY_CHAIN_LENGTH=32,CARRY_CHAIN=IGNORE,CONSTANT_CIN=0,width=4,USE_LPM_FOR_AHDL_OPERATORS=OFF] [result3,result2,result1,result0,dataa3,dataa2,dataa1,dataa0,datab3,datab2,datab1,datab0,cin];
			12 [USE_LPM_FOR_AHDL_OPERATORS=OFF,width=5,CONSTANT_CIN=0,CARRY_CHAIN=IGNORE,CARRY_CHAIN_LENGTH=32,DEVICE_FAMILY=FLEX10K] [cin,datab0,datab1,datab2,datab3,datab4,dataa0,dataa1,dataa2,dataa3,dataa4,result0,result1,result2,result3,result4];
			16 [USE_LPM_FOR_AHDL_OPERATORS=OFF,width=5,CONSTANT_CIN=0,CARRY_CHAIN=MANUAL,CARRY_CHAIN_LENGTH=32,DEVICE_FAMILY=ACEX1K] [cin,datab0,datab1,datab2,datab3,datab4,dataa0,dataa1,dataa2,dataa3,dataa4,result0,result1,result2,result3,result4];
			18 [USE_LPM_FOR_AHDL_OPERATORS=OFF,width=4,CONSTANT_CIN=0,CARRY_CHAIN=MANUAL,CARRY_CHAIN_LENGTH=32,DEVICE_FAMILY=ACEX1K] [cin,datab0,datab1,datab2,datab3,dataa0,dataa1,dataa2,dataa3,result0,result1,result2,result3];
		}
	}
	lpm_add_sub.tdf
	{
		lpm_add_sub [USE_LPM_FOR_AHDL_OPERATORS,LPM_WIDTH,LPM_REPRESENTATION=SIGNED,LPM_DIRECTION=DEFAULT,ONE_INPUT_IS_CONSTANT=NO,LPM_PIPELINE=0,MAXIMIZE_SPEED=5,OPTIMIZE_FOR_SPEED=5,CARRY_CHAIN=IGNORE,CARRY_CHAIN_LENGTH=32,DEVICE_FAMILY,STYLE] [aglobal.inc,altshift.inc,bypassff.inc,look_add.inc,addcore.inc,lpm_add_sub.inc]
		{
			13 [STYLE=WYSIWYG,DEVICE_FAMILY=FLEX10K,CARRY_CHAIN_LENGTH=32,CARRY_CHAIN=MANUAL,OPTIMIZE_FOR_SPEED=5,MAXIMIZE_SPEED=5,LPM_PIPELINE=0,ONE_INPUT_IS_CONSTANT=YES,LPM_DIRECTION=DEFAULT,LPM_REPRESENTATION=SIGNED,LPM_WIDTH=5,USE_LPM_FOR_AHDL_OPERATORS=OFF] [RESULT4,RESULT3,RESULT2,RESULT1,RESULT0,CIN,DATAB4,DATAB3,DATAB2,DATAB1,DATAB0,DATAA4,DATAA3,DATAA2,DATAA1,DATAA0];
			1 [STYLE=NORMAL,DEVICE_FAMILY=ACEX1K,CARRY_CHAIN_LENGTH=32,CARRY_CHAIN=IGNORE,OPTIMIZE_FOR_SPEED=5,MAXIMIZE_SPEED=5,LPM_PIPELINE=0,ONE_INPUT_IS_CONSTANT=YES,LPM_DIRECTION=DEFAULT,LPM_REPRESENTATION=SIGNED,LPM_WIDTH=5,USE_LPM_FOR_AHDL_OPERATORS=OFF] [RESULT4,RESULT3,RESULT2,RESULT1,RESULT0,CIN,DATAB4,DATAB3,DATAB2,DATAB1,DATAB0,DATAA4,DATAA3,DATAA2,DATAA1,DATAA0];
			5 [STYLE=NORMAL,DEVICE_FAMILY=FLEX10K,CARRY_CHAIN_LENGTH=32,CARRY_CHAIN=IGNORE,OPTIMIZE_FOR_SPEED=5,MAXIMIZE_SPEED=5,LPM_PIPELINE=0,ONE_INPUT_IS_CONSTANT=YES,LPM_DIRECTION=DEFAULT,LPM_REPRESENTATION=SIGNED,LPM_WIDTH=4,USE_LPM_FOR_AHDL_OPERATORS=OFF] [RESULT3,RESULT2,RESULT1,RESULT0,CIN,DATAB3,DATAB2,DATAB1,DATAB0,DATAA3,DATAA2,DATAA1,DATAA0];
			11 [USE_LPM_FOR_AHDL_OPERATORS=OFF,LPM_WIDTH=5,LPM_REPRESENTATION=SIGNED,LPM_DIRECTION=DEFAULT,ONE_INPUT_IS_CONSTANT=YES,LPM_PIPELINE=0,MAXIMIZE_SPEED=5,OPTIMIZE_FOR_SPEED=5,CARRY_CHAIN=IGNORE,CARRY_CHAIN_LENGTH=32,DEVICE_FAMILY=FLEX10K,STYLE=NORMAL] [DATAA0,DATAA1,DATAA2,DATAA3,DATAA4,DATAB0,DATAB1,DATAB2,DATAB3,DATAB4,CIN,RESULT0,RESULT1,RESULT2,RESULT3,RESULT4];
			15 [USE_LPM_FOR_AHDL_OPERATORS=OFF,LPM_WIDTH=5,LPM_REPRESENTATION=SIGNED,LPM_DIRECTION=DEFAULT,ONE_INPUT_IS_CONSTANT=YES,LPM_PIPELINE=0,MAXIMIZE_SPEED=5,OPTIMIZE_FOR_SPEED=5,CARRY_CHAIN=MANUAL,CARRY_CHAIN_LENGTH=32,DEVICE_FAMILY=ACEX1K,STYLE=WYSIWYG] [DATAA0,DATAA1,DATAA2,DATAA3,DATAA4,DATAB0,DATAB1,DATAB2,DATAB3,DATAB4,CIN,RESULT0,RESULT1,RESULT2,RESULT3,RESULT4];
			17 [USE_LPM_FOR_AHDL_OPERATORS=OFF,LPM_WIDTH=4,LPM_REPRESENTATION=SIGNED,LPM_DIRECTION=DEFAULT,ONE_INPUT_IS_CONSTANT=YES,LPM_PIPELINE=0,MAXIMIZE_SPEED=5,OPTIMIZE_FOR_SPEED=5,CARRY_CHAIN=MANUAL,CARRY_CHAIN_LENGTH=32,DEVICE_FAMILY=ACEX1K,STYLE=WYSIWYG] [DATAA0,DATAA1,DATAA2,DATAA3,DATAB0,DATAB1,DATAB2,DATAB3,CIN,RESULT0,RESULT1,RESULT2,RESULT3];
		}
	}
	cnt10.vhd
	{
		cnt10 [] [U1147235.DLS,U7449008.DLS,U9092257.DLS,U5125632.DLS]
		{
			4 [] [];
		}
	}
	reg32b.vhd
	{
		reg32b [] [U1147235.DLS,U7449008.DLS]
		{
			3 [] [];
		}
	}
	testctl.vhd
	{
		testctl [] [U1147235.DLS,U7449008.DLS,U9092257.DLS,U5125632.DLS]
		{
			2 [] [];
		}
	}
	freqtest.vhd
	{
		freqtest [] [U7449008.DLS,U1147235.DLS]
		{
			0 [] [];
		}
	}
}
TREE
{
	freqtest::(0,0):(0): freqtest.vhd
	{
		testctl:2:(46,8):(2996,U1): testctl.vhd;
		reg32b:3:(48,8):(2997,U2): reg32b.vhd;
		cnt10:4:(49,8):(2998,U3): cnt10.vhd
		{
			lpm_add_sub:17:(19,17):(77): lpm_add_sub.tdf
			{
				addcore:18:(212,4):(46,adder): addcore.tdf;
				altshift:7:(222,2):(65,result_ext_latency_ffs): altshift.tdf;
				altshift:8:(224,2):(79,carry_ext_latency_ffs): altshift.tdf;
				altshift:8:(226,2):(87,oflow_ext_latency_ffs): altshift.tdf;
			}
		}
		cnt10:4:(51,8):(2999,U4): cnt10.vhd
		{
			lpm_add_sub:17:(19,17):(77): lpm_add_sub.tdf
			{
				addcore:18:(212,4):(46,adder): addcore.tdf;
				altshift:7:(222,2):(65,result_ext_latency_ffs): altshift.tdf;
				altshift:8:(224,2):(79,carry_ext_latency_ffs): altshift.tdf;
				altshift:8:(226,2):(87,oflow_ext_latency_ffs): altshift.tdf;
			}
		}
		cnt10:4:(54,8):(3000,U5): cnt10.vhd
		{
			lpm_add_sub:17:(19,17):(77): lpm_add_sub.tdf
			{
				addcore:18:(212,4):(46,adder): addcore.tdf;
				altshift:7:(222,2):(65,result_ext_latency_ffs): altshift.tdf;
				altshift:8:(224,2):(79,carry_ext_latency_ffs): altshift.tdf;
				altshift:8:(226,2):(87,oflow_ext_latency_ffs): altshift.tdf;
			}
		}
		cnt10:4:(57,8):(3001,U6): cnt10.vhd
		{
			lpm_add_sub:17:(19,17):(77): lpm_add_sub.tdf
			{
				addcore:18:(212,4):(46,adder): addcore.tdf;
				altshift:7:(222,2):(65,result_ext_latency_ffs): altshift.tdf;
				altshift:8:(224,2):(79,carry_ext_latency_ffs): altshift.tdf;
				altshift:8:(226,2):(87,oflow_ext_latency_ffs): altshift.tdf;
			}
		}
		cnt10:4:(60,8):(3002,U7): cnt10.vhd
		{
			lpm_add_sub:17:(19,17):(77): lpm_add_sub.tdf
			{
				addcore:18:(212,4):(46,adder): addcore.tdf;
				altshift:7:(222,2):(65,result_ext_latency_ffs): altshift.tdf;
				altshift:8:(224,2):(79,carry_ext_latency_ffs): altshift.tdf;
				altshift:8:(226,2):(87,oflow_ext_latency_ffs): altshift.tdf;
			}
		}
		cnt10:4:(63,8):(3003,U8): cnt10.vhd
		{
			lpm_add_sub:17:(19,17):(77): lpm_add_sub.tdf
			{
				addcore:18:(212,4):(46,adder): addcore.tdf;
				altshift:7:(222,2):(65,result_ext_latency_ffs): altshift.tdf;
				altshift:8:(224,2):(79,carry_ext_latency_ffs): altshift.tdf;
				altshift:8:(226,2):(87,oflow_ext_latency_ffs): altshift.tdf;
			}
		}
		cnt10:4:(66,8):(3004,U9): cnt10.vhd
		{
			lpm_add_sub:17:(19,17):(77): lpm_add_sub.tdf
			{
				addcore:18:(212,4):(46,adder): addcore.tdf;
				altshift:7:(222,2):(65,result_ext_latency_ffs): altshift.tdf;
				altshift:8:(224,2):(79,carry_ext_latency_ffs): altshift.tdf;
				altshift:8:(226,2):(87,oflow_ext_latency_ffs): altshift.tdf;
			}
		}
		cnt10:4:(69,9):(3005,U10): cnt10.vhd
		{
			lpm_add_sub:17:(19,17):(77): lpm_add_sub.tdf
			{
				addcore:18:(212,4):(46,adder): addcore.tdf;
				altshift:7:(222,2):(65,result_ext_latency_ffs): altshift.tdf;
				altshift:8:(224,2):(79,carry_ext_latency_ffs): altshift.tdf;
				altshift:8:(226,2):(87,oflow_ext_latency_ffs): altshift.tdf;
			}
		}
	}
}