freqtest.srm

基于fpga和sopc的用VHDL语言编写的EDA频率测试与FPGA单片机通讯

f "noname"; #file 0
f "d:\edapro\synplcty\lib\vhd\std.vhd"; #file 1
f "d:\k30demo\sendfre\testctl.vhd"; #file 2
f "d:\edapro\synplcty\lib\vhd\std1164.vhd"; #file 3
f "d:\edapro\synplcty\lib\vhd\unsigned.vhd"; #file 4
f "d:\edapro\synplcty\lib\vhd\arith.vhd"; #file 5
f "d:\k30demo\sendfre\reg32b.vhd"; #file 6
f "d:\k30demo\sendfre\freqtest.vhd"; #file 7
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g9S87=0rF4.
g9SiBp=00#C_M4H
_jS)BphB=eBu
S)eh=B
B;s@R@n.:4:4d:.R:cf:dggcgcRaqp R)q1w_7w)RuQ7vRmrzad
j9S7T=mrzad
j9S87=0rF4d
j9SiBp=00#C_M4H
_jS)BphB=eBu
S)eh=B
B;s@R@n.:4:4d:.R:cf:dggcgcRaqp R)q1w_7w)RuQ7vRmrzad
49S7T=mrzad
49S87=0rF4d
49SiBp=00#C_M4H
_jS)BphB=eBu
S)eh=B