testctl.srm

基于fpga和sopc的用VHDL语言编写的EDA频率测试与FPGA单片机通讯

f "noname"; #file 0
f "d:\edapro\synplcty\lib\vhd\std.vhd"; #file 1
f "d:\k30demo\sendfre\freqtest.vhd"; #file 2
f "d:\edapro\synplcty\lib\vhd\std1164.vhd"; #file 3
f "d:\k30demo\sendfre\cnt10.vhd"; #file 4
f "d:\k30demo\sendfre\reg32b.vhd"; #file 5
f "d:\k30demo\sendfre\testctl.vhd"; #file 6
f "d:\edapro\synplcty\lib\vhd\unsigned.vhd"; #file 7
f "d:\edapro\synplcty\lib\vhd\arith.vhd"; #file 8
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