etester.tan.summary

基于fpga和sopc的用VHDL语言编写的EDA等精度频率设计

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 5.617 ns
From           : SPUL
To             : lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[26]
From Clock     : 
To Clock       : BCLK
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 12.440 ns
From           : Q3
To             : EEND
From Clock     : TCLK
To Clock       : 
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 11.818 ns
From           : SEL[0]
To             : DATA[7]
From Clock     : 
To Clock       : 
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : -0.337 ns
From           : CL
To             : ENA
From Clock     : 
To Clock       : TCLK
Failed Paths   : 0

Type           : Worst-case Minimum tco
Slack          : N/A
Required Time  : None
Actual Time    : 5.810 ns
From           : lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[0]
To             : DATA[0]
From Clock     : BCLK
To Clock       : 
Failed Paths   : 0

Type           : Worst-case Minimum tpd
Slack          : N/A
Required Time  : None
Actual Time    : 8.716 ns
From           : SEL[1]
To             : DATA[5]
From Clock     : 
To Clock       : 
Failed Paths   : 0

Type           : Clock Setup: 'TCLK'
Slack          : N/A
Required Time  : None
Actual Time    : 375.52 MHz ( period = 2.663 ns )
From           : lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|safe_q[2]
To             : lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|safe_q[31]
From Clock     : TCLK
To Clock       : TCLK
Failed Paths   : 0

Type           : Clock Setup: 'BCLK'
Slack          : N/A
Required Time  : None
Actual Time    : 377.22 MHz ( period = 2.651 ns )
From           : lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[2]
To             : lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[31]
From Clock     : BCLK
To Clock       : BCLK
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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