etester.map.eqn

基于fpga和sopc的用VHDL语言编写的EDA等精度频率设计

C1_safe_q[2]_carry_eqn = C1L4;
C1_safe_q[2]_lut_out = C1_safe_q[2] $ !C1_safe_q[2]_carry_eqn;
C1_safe_q[2] = DFFEA(C1_safe_q[2]_lut_out, BCLK, !CLR, , A1L2, , );

--C1L6 is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|counter_cella2~COUT
--operation mode is arithmetic

C1L6 = CARRY(C1_safe_q[2] & !C1L4);


--A1L15 is DATA~8079
--operation mode is normal

A1L15 = A1L94 # A1L17 & A1L05 # !A1L17 & C1_safe_q[2];


--C1_safe_q[25] is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[25]
--operation mode is arithmetic

C1_safe_q[25]_carry_eqn = C1L05;
C1_safe_q[25]_lut_out = C1_safe_q[25] $ C1_safe_q[25]_carry_eqn;
C1_safe_q[25] = DFFEA(C1_safe_q[25]_lut_out, BCLK, !CLR, , A1L2, , );

--C1L25 is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|counter_cella25~COUT
--operation mode is arithmetic

C1L25 = CARRY(!C1L05 # !C1_safe_q[25]);


--A1L25 is DATA~8080
--operation mode is normal

A1L25 = C1_safe_q[25] & SEL[1] & SEL[0] & !SEL[2];


--C2_safe_q[17] is lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|safe_q[17]
--operation mode is arithmetic

C2_safe_q[17]_carry_eqn = C2L43;
C2_safe_q[17]_lut_out = C2_safe_q[17] $ C2_safe_q[17]_carry_eqn;
C2_safe_q[17] = DFFEA(C2_safe_q[17]_lut_out, TCLK, !CLR, , ENA, , );

--C2L63 is lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|counter_cella17~COUT
--operation mode is arithmetic

C2L63 = CARRY(!C2L43 # !C2_safe_q[17]);


--C2_safe_q[1] is lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|safe_q[1]
--operation mode is arithmetic

C2_safe_q[1]_carry_eqn = C2L2;
C2_safe_q[1]_lut_out = C2_safe_q[1] $ C2_safe_q[1]_carry_eqn;
C2_safe_q[1] = DFFEA(C2_safe_q[1]_lut_out, TCLK, !CLR, , ENA, , );

--C2L4 is lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|counter_cella1~COUT
--operation mode is arithmetic

C2L4 = CARRY(!C2L2 # !C2_safe_q[1]);


--A1L35 is DATA~8081
--operation mode is normal

A1L35 = !SEL[0] & (SEL[1] & C2_safe_q[17] # !SEL[1] & C2_safe_q[1]);


--C2_safe_q[25] is lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|safe_q[25]
--operation mode is arithmetic

C2_safe_q[25]_carry_eqn = C2L05;
C2_safe_q[25]_lut_out = C2_safe_q[25] $ C2_safe_q[25]_carry_eqn;
C2_safe_q[25] = DFFEA(C2_safe_q[25]_lut_out, TCLK, !CLR, , ENA, , );

--C2L25 is lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|counter_cella25~COUT
--operation mode is arithmetic

C2L25 = CARRY(!C2L05 # !C2_safe_q[25]);


--C2_safe_q[9] is lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|safe_q[9]
--operation mode is arithmetic

C2_safe_q[9]_carry_eqn = C2L81;
C2_safe_q[9]_lut_out = C2_safe_q[9] $ C2_safe_q[9]_carry_eqn;
C2_safe_q[9] = DFFEA(C2_safe_q[9]_lut_out, TCLK, !CLR, , ENA, , );

--C2L02 is lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|counter_cella9~COUT
--operation mode is arithmetic

C2L02 = CARRY(!C2L81 # !C2_safe_q[9]);


--A1L45 is DATA~8082
--operation mode is normal

A1L45 = SEL[0] & (SEL[1] & C2_safe_q[25] # !SEL[1] & C2_safe_q[9]);


--A1L55 is DATA~8083
--operation mode is normal

A1L55 = A1L25 # SEL[2] & (A1L35 # A1L45);


--C1_safe_q[17] is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[17]
--operation mode is arithmetic

C1_safe_q[17]_carry_eqn = C1L43;
C1_safe_q[17]_lut_out = C1_safe_q[17] $ C1_safe_q[17]_carry_eqn;
C1_safe_q[17] = DFFEA(C1_safe_q[17]_lut_out, BCLK, !CLR, , A1L2, , );

--C1L63 is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|counter_cella17~COUT
--operation mode is arithmetic

C1L63 = CARRY(!C1L43 # !C1_safe_q[17]);


--C1_safe_q[9] is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[9]
--operation mode is arithmetic

C1_safe_q[9]_carry_eqn = C1L81;
C1_safe_q[9]_lut_out = C1_safe_q[9] $ C1_safe_q[9]_carry_eqn;
C1_safe_q[9] = DFFEA(C1_safe_q[9]_lut_out, BCLK, !CLR, , A1L2, , );

--C1L02 is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|counter_cella9~COUT
--operation mode is arithmetic

C1L02 = CARRY(!C1L81 # !C1_safe_q[9]);


--A1L65 is DATA~8084
--operation mode is normal

A1L65 = C1_safe_q[17] & (A1L91 # C1_safe_q[9] & !A1L07) # !C1_safe_q[17] & C1_safe_q[9] & !A1L07;


--C1_safe_q[1] is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[1]
--operation mode is arithmetic

C1_safe_q[1]_carry_eqn = C1L2;
C1_safe_q[1]_lut_out = C1_safe_q[1] $ C1_safe_q[1]_carry_eqn;
C1_safe_q[1] = DFFEA(C1_safe_q[1]_lut_out, BCLK, !CLR, , A1L2, , );

--C1L4 is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|counter_cella1~COUT
--operation mode is arithmetic

C1L4 = CARRY(!C1L2 # !C1_safe_q[1]);


--A1L75 is DATA~8085
--operation mode is normal

A1L75 = A1L55 # A1L17 & A1L65 # !A1L17 & C1_safe_q[1];


--C1_safe_q[24] is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[24]
--operation mode is arithmetic

C1_safe_q[24]_carry_eqn = C1L84;
C1_safe_q[24]_lut_out = C1_safe_q[24] $ !C1_safe_q[24]_carry_eqn;
C1_safe_q[24] = DFFEA(C1_safe_q[24]_lut_out, BCLK, !CLR, , A1L2, , );

--C1L05 is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|counter_cella24~COUT
--operation mode is arithmetic

C1L05 = CARRY(C1_safe_q[24] & !C1L84);


--A1L85 is DATA~8086
--operation mode is normal

A1L85 = C1_safe_q[24] & SEL[1] & SEL[0] & !SEL[2];


--C2_safe_q[16] is lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|safe_q[16]
--operation mode is arithmetic

C2_safe_q[16]_carry_eqn = C2L23;
C2_safe_q[16]_lut_out = C2_safe_q[16] $ !C2_safe_q[16]_carry_eqn;
C2_safe_q[16] = DFFEA(C2_safe_q[16]_lut_out, TCLK, !CLR, , ENA, , );

--C2L43 is lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|counter_cella16~COUT
--operation mode is arithmetic

C2L43 = CARRY(C2_safe_q[16] & !C2L23);


--C2_safe_q[0] is lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|safe_q[0]
--operation mode is arithmetic

C2_safe_q[0]_lut_out = !C2_safe_q[0];
C2_safe_q[0] = DFFEA(C2_safe_q[0]_lut_out, TCLK, !CLR, , ENA, , );

--C2L2 is lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|counter_cella0~COUT
--operation mode is arithmetic

C2L2 = CARRY(C2_safe_q[0]);


--A1L95 is DATA~8087
--operation mode is normal

A1L95 = !SEL[0] & (SEL[1] & C2_safe_q[16] # !SEL[1] & C2_safe_q[0]);


--C2_safe_q[24] is lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|safe_q[24]
--operation mode is arithmetic

C2_safe_q[24]_carry_eqn = C2L84;
C2_safe_q[24]_lut_out = C2_safe_q[24] $ !C2_safe_q[24]_carry_eqn;
C2_safe_q[24] = DFFEA(C2_safe_q[24]_lut_out, TCLK, !CLR, , ENA, , );

--C2L05 is lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|counter_cella24~COUT
--operation mode is arithmetic

C2L05 = CARRY(C2_safe_q[24] & !C2L84);


--C2_safe_q[8] is lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|safe_q[8]
--operation mode is arithmetic

C2_safe_q[8]_carry_eqn = C2L61;
C2_safe_q[8]_lut_out = C2_safe_q[8] $ !C2_safe_q[8]_carry_eqn;
C2_safe_q[8] = DFFEA(C2_safe_q[8]_lut_out, TCLK, !CLR, , ENA, , );

--C2L81 is lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|counter_cella8~COUT
--operation mode is arithmetic

C2L81 = CARRY(C2_safe_q[8] & !C2L61);


--A1L06 is DATA~8088
--operation mode is normal

A1L06 = SEL[0] & (SEL[1] & C2_safe_q[24] # !SEL[1] & C2_safe_q[8]);


--A1L16 is DATA~8089
--operation mode is normal

A1L16 = A1L85 # SEL[2] & (A1L95 # A1L06);


--C1_safe_q[16] is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[16]
--operation mode is arithmetic

C1_safe_q[16]_carry_eqn = C1L23;
C1_safe_q[16]_lut_out = C1_safe_q[16] $ !C1_safe_q[16]_carry_eqn;
C1_safe_q[16] = DFFEA(C1_safe_q[16]_lut_out, BCLK, !CLR, , A1L2, , );

--C1L43 is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|counter_cella16~COUT
--operation mode is arithmetic

C1L43 = CARRY(C1_safe_q[16] & !C1L23);


--C1_safe_q[8] is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[8]
--operation mode is arithmetic

C1_safe_q[8]_carry_eqn = C1L61;
C1_safe_q[8]_lut_out = C1_safe_q[8] $ !C1_safe_q[8]_carry_eqn;
C1_safe_q[8] = DFFEA(C1_safe_q[8]_lut_out, BCLK, !CLR, , A1L2, , );

--C1L81 is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|counter_cella8~COUT
--operation mode is arithmetic

C1L81 = CARRY(C1_safe_q[8] & !C1L61);


--A1L26 is DATA~8090
--operation mode is normal

A1L26 = C1_safe_q[16] & (A1L91 # C1_safe_q[8] & !A1L07) # !C1_safe_q[16] & C1_safe_q[8] & !A1L07;


--C1_safe_q[0] is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[0]
--operation mode is arithmetic

C1_safe_q[0]_lut_out = !C1_safe_q[0];
C1_safe_q[0] = DFFEA(C1_safe_q[0]_lut_out, BCLK, !CLR, , A1L2, , );

--C1L2 is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|counter_cella0~COUT
--operation mode is arithmetic

C1L2 = CARRY(C1_safe_q[0]);


--A1L36 is DATA~8091
--operation mode is normal

A1L36 = A1L16 # A1L17 & A1L26 # !A1L17 & C1_safe_q[0];


--Q1 is Q1
--operation mode is normal

Q1_lut_out = VCC;
Q1 = DFFEA(Q1_lut_out, A1L66, !CLR, , , , );


--CLK2 is CLK2
--operation mode is normal

CLK2 = CL $ TCLK # !Q1;


--A1L2 is BENA~23
--operation mode is normal

A1L2 = SPUL & ENA # !SPUL & Q2 & !Q3;


--A1L66 is MA~7
--operation mode is normal

A1L66 = CL $ TCLK;


--SEL[1] is SEL[1]
--operation mode is input

SEL[1] = INPUT();


--SEL[0] is SEL[0]
--operation mode is input

SEL[0] = INPUT();


--SEL[2] is SEL[2]
--operation mode is input

SEL[2] = INPUT();


--CL is CL
--operation mode is input

CL = INPUT();


--TCLK is TCLK
--operation mode is input

TCLK = INPUT();


--CLR is CLR
--operation mode is input

CLR = INPUT();


--BCLK is BCLK
--operation mode is input

BCLK = INPUT();


--SPUL is SPUL
--operation mode is input

SPUL = INPUT();


--START is START
--operation mode is output

START = OUTPUT(ENA);


--EEND is EEND
--operation mode is output

EEND = OUTPUT(!A1L27);


--DATA[7] is DATA[7]
--operation mode is output

DATA[7] = OUTPUT(A1L12);


--DATA[6] is DATA[6]
--operation mode is output

DATA[6] = OUTPUT(A1L72);


--DATA[5] is DATA[5]
--operation mode is output

DATA[5] = OUTPUT(A1L33);


--DATA[4] is DATA[4]
--operation mode is output

DATA[4] = OUTPUT(A1L93);


--DATA[3] is DATA[3]
--operation mode is output

DATA[3] = OUTPUT(A1L54);


--DATA[2] is DATA[2]
--operation mode is output

DATA[2] = OUTPUT(A1L15);


--DATA[1] is DATA[1]
--operation mode is output

DATA[1] = OUTPUT(A1L75);


--DATA[0] is DATA[0]
--operation mode is output

DATA[0] = OUTPUT(A1L36);