etester.fit.eqn

基于fpga和sopc的用VHDL语言编写的EDA等精度频率设计

A1L45 = SEL[0] & (SEL[1] & C2_safe_q[25] # !SEL[1] & C2_safe_q[9]);


--A1L55 is DATA~8083 at LC_X1_Y9_N9
--operation mode is normal

A1L55 = A1L25 # SEL[2] & (A1L35 # A1L45);


--C1_safe_q[17] is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[17] at LC_X2_Y3_N1
--operation mode is arithmetic

C1_safe_q[17]_carry_eqn = (!C1L23 & C1L601) # (C1L23 & C1L701);
C1_safe_q[17]_lut_out = C1_safe_q[17] $ C1_safe_q[17]_carry_eqn;
C1_safe_q[17] = DFFEA(C1_safe_q[17]_lut_out, GLOBAL(BCLK), !GLOBAL(CLR), , A1L2, , );

--C1L901 is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[17]~COUT0 at LC_X2_Y3_N1
--operation mode is arithmetic

C1L901_cout_0 = !C1L601 # !C1_safe_q[17];
C1L901 = CARRY(C1L901_cout_0);

--C1L011 is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[17]~COUT1 at LC_X2_Y3_N1
--operation mode is arithmetic

C1L011_cout_1 = !C1L701 # !C1_safe_q[17];
C1L011 = CARRY(C1L011_cout_1);


--C1_safe_q[9] is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[9] at LC_X2_Y4_N3
--operation mode is arithmetic

C1_safe_q[9]_carry_eqn = (!C1L21 & C1L68) # (C1L21 & C1L78);
C1_safe_q[9]_lut_out = C1_safe_q[9] $ C1_safe_q[9]_carry_eqn;
C1_safe_q[9] = DFFEA(C1_safe_q[9]_lut_out, GLOBAL(BCLK), !GLOBAL(CLR), , A1L2, , );

--C1L98 is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[9]~COUT0 at LC_X2_Y4_N3
--operation mode is arithmetic

C1L98_cout_0 = !C1L68 # !C1_safe_q[9];
C1L98 = CARRY(C1L98_cout_0);

--C1L09 is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[9]~COUT1 at LC_X2_Y4_N3
--operation mode is arithmetic

C1L09_cout_1 = !C1L78 # !C1_safe_q[9];
C1L09 = CARRY(C1L09_cout_1);


--A1L65 is DATA~8084 at LC_X1_Y4_N2
--operation mode is normal

A1L65 = C1_safe_q[9] & (C1_safe_q[17] & A1L91 # !A1L07) # !C1_safe_q[9] & C1_safe_q[17] & A1L91;


--C1_safe_q[1] is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[1] at LC_X2_Y5_N5
--operation mode is arithmetic

C1_safe_q[1]_carry_eqn = C1L2;
C1_safe_q[1]_lut_out = C1_safe_q[1] $ C1_safe_q[1]_carry_eqn;
C1_safe_q[1] = DFFEA(C1_safe_q[1]_lut_out, GLOBAL(BCLK), !GLOBAL(CLR), , A1L2, , );

--C1L76 is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[1]~COUT0 at LC_X2_Y5_N5
--operation mode is arithmetic

C1L76_cout_0 = !C1L2 # !C1_safe_q[1];
C1L76 = CARRY(C1L76_cout_0);

--C1L86 is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[1]~COUT1 at LC_X2_Y5_N5
--operation mode is arithmetic

C1L86_cout_1 = !C1L2 # !C1_safe_q[1];
C1L86 = CARRY(C1L86_cout_1);


--A1L75 is DATA~8085 at LC_X1_Y5_N9
--operation mode is normal

A1L75 = A1L55 # A1L17 & A1L65 # !A1L17 & C1_safe_q[1];


--C1_safe_q[24] is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[24] at LC_X2_Y3_N8
--operation mode is arithmetic

C1_safe_q[24]_carry_eqn = (!C1L24 & C1L521) # (C1L24 & C1L621);
C1_safe_q[24]_lut_out = C1_safe_q[24] $ !C1_safe_q[24]_carry_eqn;
C1_safe_q[24] = DFFEA(C1_safe_q[24]_lut_out, GLOBAL(BCLK), !GLOBAL(CLR), , A1L2, , );

--C1L821 is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[24]~COUT0 at LC_X2_Y3_N8
--operation mode is arithmetic

C1L821_cout_0 = C1_safe_q[24] & !C1L521;
C1L821 = CARRY(C1L821_cout_0);

--C1L921 is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[24]~COUT1 at LC_X2_Y3_N8
--operation mode is arithmetic

C1L921_cout_1 = C1_safe_q[24] & !C1L621;
C1L921 = CARRY(C1L921_cout_1);


--A1L85 is DATA~8086 at LC_X1_Y5_N3
--operation mode is normal

A1L85 = !SEL[2] & SEL[1] & C1_safe_q[24] & SEL[0];


--C2_safe_q[16] is lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|safe_q[16] at LC_X2_Y10_N0
--operation mode is arithmetic

C2_safe_q[16]_carry_eqn = C2L23;
C2_safe_q[16]_lut_out = C2_safe_q[16] $ !C2_safe_q[16]_carry_eqn;
C2_safe_q[16] = DFFEA(C2_safe_q[16]_lut_out, GLOBAL(TCLK), !GLOBAL(CLR), , ENA, , );

--C2L601 is lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|safe_q[16]~COUT0 at LC_X2_Y10_N0
--operation mode is arithmetic

C2L601_cout_0 = C2_safe_q[16] & !C2L23;
C2L601 = CARRY(C2L601_cout_0);

--C2L701 is lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|safe_q[16]~COUT1 at LC_X2_Y10_N0
--operation mode is arithmetic

C2L701_cout_1 = C2_safe_q[16] & !C2L23;
C2L701 = CARRY(C2L701_cout_1);


--C2_safe_q[0] is lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|safe_q[0] at LC_X2_Y12_N4
--operation mode is arithmetic

C2_safe_q[0]_lut_out = !C2_safe_q[0];
C2_safe_q[0] = DFFEA(C2_safe_q[0]_lut_out, GLOBAL(TCLK), !GLOBAL(CLR), , ENA, , );

--C2L2 is lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|counter_cella0~COUT at LC_X2_Y12_N4
--operation mode is arithmetic

C2L2 = CARRY(C2_safe_q[0]);


--A1L95 is DATA~8087 at LC_X1_Y10_N4
--operation mode is normal

A1L95 = !SEL[0] & (SEL[1] & C2_safe_q[16] # !SEL[1] & C2_safe_q[0]);


--C2_safe_q[24] is lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|safe_q[24] at LC_X2_Y10_N8
--operation mode is arithmetic

C2_safe_q[24]_carry_eqn = (!C2L24 & C2L521) # (C2L24 & C2L621);
C2_safe_q[24]_lut_out = C2_safe_q[24] $ !C2_safe_q[24]_carry_eqn;
C2_safe_q[24] = DFFEA(C2_safe_q[24]_lut_out, GLOBAL(TCLK), !GLOBAL(CLR), , ENA, , );

--C2L821 is lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|safe_q[24]~COUT0 at LC_X2_Y10_N8
--operation mode is arithmetic

C2L821_cout_0 = C2_safe_q[24] & !C2L521;
C2L821 = CARRY(C2L821_cout_0);

--C2L921 is lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|safe_q[24]~COUT1 at LC_X2_Y10_N8
--operation mode is arithmetic

C2L921_cout_1 = C2_safe_q[24] & !C2L621;
C2L921 = CARRY(C2L921_cout_1);


--C2_safe_q[8] is lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|safe_q[8] at LC_X2_Y11_N2
--operation mode is arithmetic

C2_safe_q[8]_carry_eqn = (!C2L21 & C2L38) # (C2L21 & C2L48);
C2_safe_q[8]_lut_out = C2_safe_q[8] $ !C2_safe_q[8]_carry_eqn;
C2_safe_q[8] = DFFEA(C2_safe_q[8]_lut_out, GLOBAL(TCLK), !GLOBAL(CLR), , ENA, , );

--C2L68 is lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|safe_q[8]~COUT0 at LC_X2_Y11_N2
--operation mode is arithmetic

C2L68_cout_0 = C2_safe_q[8] & !C2L38;
C2L68 = CARRY(C2L68_cout_0);

--C2L78 is lpm_counter:TSQ_rtl_1|cntr_b08:auto_generated|safe_q[8]~COUT1 at LC_X2_Y11_N2
--operation mode is arithmetic

C2L78_cout_1 = C2_safe_q[8] & !C2L48;
C2L78 = CARRY(C2L78_cout_1);


--A1L06 is DATA~8088 at LC_X1_Y11_N9
--operation mode is normal

A1L06 = SEL[0] & (SEL[1] & C2_safe_q[24] # !SEL[1] & C2_safe_q[8]);


--A1L16 is DATA~8089 at LC_X1_Y5_N2
--operation mode is normal

A1L16 = A1L85 # SEL[2] & (A1L95 # A1L06);


--C1_safe_q[16] is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[16] at LC_X2_Y3_N0
--operation mode is arithmetic

C1_safe_q[16]_carry_eqn = C1L23;
C1_safe_q[16]_lut_out = C1_safe_q[16] $ !C1_safe_q[16]_carry_eqn;
C1_safe_q[16] = DFFEA(C1_safe_q[16]_lut_out, GLOBAL(BCLK), !GLOBAL(CLR), , A1L2, , );

--C1L601 is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[16]~COUT0 at LC_X2_Y3_N0
--operation mode is arithmetic

C1L601_cout_0 = C1_safe_q[16] & !C1L23;
C1L601 = CARRY(C1L601_cout_0);

--C1L701 is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[16]~COUT1 at LC_X2_Y3_N0
--operation mode is arithmetic

C1L701_cout_1 = C1_safe_q[16] & !C1L23;
C1L701 = CARRY(C1L701_cout_1);


--C1_safe_q[8] is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[8] at LC_X2_Y4_N2
--operation mode is arithmetic

C1_safe_q[8]_carry_eqn = (!C1L21 & C1L38) # (C1L21 & C1L48);
C1_safe_q[8]_lut_out = C1_safe_q[8] $ !C1_safe_q[8]_carry_eqn;
C1_safe_q[8] = DFFEA(C1_safe_q[8]_lut_out, GLOBAL(BCLK), !GLOBAL(CLR), , A1L2, , );

--C1L68 is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[8]~COUT0 at LC_X2_Y4_N2
--operation mode is arithmetic

C1L68_cout_0 = C1_safe_q[8] & !C1L38;
C1L68 = CARRY(C1L68_cout_0);

--C1L78 is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[8]~COUT1 at LC_X2_Y4_N2
--operation mode is arithmetic

C1L78_cout_1 = C1_safe_q[8] & !C1L48;
C1L78 = CARRY(C1L78_cout_1);


--A1L26 is DATA~8090 at LC_X1_Y4_N6
--operation mode is normal

A1L26 = C1_safe_q[16] & (A1L91 # C1_safe_q[8] & !A1L07) # !C1_safe_q[16] & C1_safe_q[8] & !A1L07;


--C1_safe_q[0] is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|safe_q[0] at LC_X2_Y5_N4
--operation mode is arithmetic

C1_safe_q[0]_lut_out = !C1_safe_q[0];
C1_safe_q[0] = DFFEA(C1_safe_q[0]_lut_out, GLOBAL(BCLK), !GLOBAL(CLR), , A1L2, , );

--C1L2 is lpm_counter:BZQ_rtl_0|cntr_b08:auto_generated|counter_cella0~COUT at LC_X2_Y5_N4
--operation mode is arithmetic

C1L2 = CARRY(C1_safe_q[0]);


--A1L36 is DATA~8091 at LC_X2_Y5_N2
--operation mode is normal

A1L36 = A1L16 # A1L17 & A1L26 # !A1L17 & C1_safe_q[0];


--Q1 is Q1 at LC_X3_Y9_N0
--operation mode is normal

Q1_lut_out = VCC;
Q1 = DFFEA(Q1_lut_out, A1L66, !GLOBAL(CLR), , , , );


--CLK2 is CLK2 at LC_X3_Y9_N8
--operation mode is normal

CLK2 = CL $ TCLK # !Q1;


--A1L2 is BENA~23 at LC_X2_Y9_N9
--operation mode is normal

ENA_qfbk = ENA;
A1L2 = SPUL & ENA_qfbk # !SPUL & !Q3 & Q2;

--ENA is ENA at LC_X2_Y9_N9
--operation mode is normal

ENA_sload_eqn = CL;
ENA = DFFEA(ENA_sload_eqn, GLOBAL(TCLK), !GLOBAL(CLR), , , , );


--A1L66 is MA~7 at LC_X3_Y9_N2
--operation mode is normal

A1L66 = CL $ TCLK;


--SEL[1] is SEL[1] at PIN_6
--operation mode is input

SEL[1] = INPUT();


--SEL[0] is SEL[0] at PIN_5
--operation mode is input

SEL[0] = INPUT();


--SEL[2] is SEL[2] at PIN_7
--operation mode is input

SEL[2] = INPUT();


--CL is CL at PIN_2
--operation mode is input

CL = INPUT();


--TCLK is TCLK at PIN_39
--operation mode is input

TCLK = INPUT();


--CLR is CLR at PIN_1
--operation mode is input

CLR = INPUT();


--BCLK is BCLK at PIN_17
--operation mode is input

BCLK = INPUT();


--SPUL is SPUL at PIN_3
--operation mode is input

SPUL = INPUT();


--START is START at PIN_10
--operation mode is output

START = OUTPUT(ENA);


--EEND is EEND at PIN_4
--operation mode is output

EEND = OUTPUT(!A1L27);


--DATA[7] is DATA[7] at PIN_11
--operation mode is output

DATA[7] = OUTPUT(A1L12);


--DATA[6] is DATA[6] at PIN_32
--operation mode is output

DATA[6] = OUTPUT(A1L72);


--DATA[5] is DATA[5] at PIN_33
--operation mode is output

DATA[5] = OUTPUT(A1L33);


--DATA[4] is DATA[4] at PIN_34
--operation mode is output

DATA[4] = OUTPUT(A1L93);


--DATA[3] is DATA[3] at PIN_35
--operation mode is output

DATA[3] = OUTPUT(A1L54);


--DATA[2] is DATA[2] at PIN_36
--operation mode is output

DATA[2] = OUTPUT(A1L15);


--DATA[1] is DATA[1] at PIN_37
--operation mode is output

DATA[1] = OUTPUT(A1L75);


--DATA[0] is DATA[0] at PIN_38
--operation mode is output

DATA[0] = OUTPUT(A1L36);