multi8x8.fit.eqn

基于fpga和sopc的用VHDL语言编写的EDA移位相加硬件乘法器

H1L61 = CARRY(H1L61_cout_0);

--H1L71 is ARICTL:U1|lpm_counter:CNT4B_rtl_0|cntr_qu7:auto_generated|safe_q[2]~COUT1 at LC_X7_Y14_N7
--operation mode is arithmetic

H1L71_cout_1 = H1_safe_q[2] & !H1L41;
H1L71 = CARRY(H1L71_cout_1);


--C1_REG8[1] is SREG8B:U2|REG8[1] at LC_X1_Y15_N9
--operation mode is normal

C1_REG8[1]_lut_out = B[1] & (A1L73 # C1_REG8[2]) # !B[1] & !A1L73 & C1_REG8[2];
C1_REG8[1] = DFFEA(C1_REG8[1]_lut_out, GLOBAL(B1L1), VCC, , , , );


--H1_safe_q[1] is ARICTL:U1|lpm_counter:CNT4B_rtl_0|cntr_qu7:auto_generated|safe_q[1] at LC_X7_Y14_N6
--operation mode is arithmetic

H1_safe_q[1]_lut_out = H1_safe_q[1] $ H1L01;
H1_safe_q[1] = DFFEA(H1_safe_q[1]_lut_out, GLOBAL(CLKK), !GLOBAL(A1L73), , !H1_safe_q[3], , );

--H1L31 is ARICTL:U1|lpm_counter:CNT4B_rtl_0|cntr_qu7:auto_generated|safe_q[1]~COUT0 at LC_X7_Y14_N6
--operation mode is arithmetic

H1L31_cout_0 = !H1L01 # !H1_safe_q[1];
H1L31 = CARRY(H1L31_cout_0);

--H1L41 is ARICTL:U1|lpm_counter:CNT4B_rtl_0|cntr_qu7:auto_generated|safe_q[1]~COUT1 at LC_X7_Y14_N6
--operation mode is arithmetic

H1L41_cout_1 = !H1L11 # !H1_safe_q[1];
H1L41 = CARRY(H1L41_cout_1);


--C1_REG8[2] is SREG8B:U2|REG8[2] at LC_X1_Y15_N1
--operation mode is normal

C1_REG8[2]_lut_out = B[2] & (A1L73 # C1_REG8[3]) # !B[2] & !A1L73 & C1_REG8[3];
C1_REG8[2] = DFFEA(C1_REG8[2]_lut_out, GLOBAL(B1L1), VCC, , , , );


--H1_safe_q[0] is ARICTL:U1|lpm_counter:CNT4B_rtl_0|cntr_qu7:auto_generated|safe_q[0] at LC_X7_Y14_N5
--operation mode is arithmetic

H1_safe_q[0]_lut_out = !H1_safe_q[0];
H1_safe_q[0] = DFFEA(H1_safe_q[0]_lut_out, GLOBAL(CLKK), !GLOBAL(A1L73), , !H1_safe_q[3], , );

--H1L01 is ARICTL:U1|lpm_counter:CNT4B_rtl_0|cntr_qu7:auto_generated|safe_q[0]~COUT0 at LC_X7_Y14_N5
--operation mode is arithmetic

H1L01_cout_0 = H1_safe_q[0];
H1L01 = CARRY(H1L01_cout_0);

--H1L11 is ARICTL:U1|lpm_counter:CNT4B_rtl_0|cntr_qu7:auto_generated|safe_q[0]~COUT1 at LC_X7_Y14_N5
--operation mode is arithmetic

H1L11_cout_1 = H1_safe_q[0];
H1L11 = CARRY(H1L11_cout_1);


--C1_REG8[3] is SREG8B:U2|REG8[3] at LC_X1_Y15_N0
--operation mode is normal

C1_REG8[3]_lut_out = A1L73 & B[3] # !A1L73 & C1_REG8[4];
C1_REG8[3] = DFFEA(C1_REG8[3]_lut_out, GLOBAL(B1L1), VCC, , , , );


--C1_REG8[4] is SREG8B:U2|REG8[4] at LC_X1_Y15_N2
--operation mode is normal

C1_REG8[4]_lut_out = B[4] & (A1L73 # C1_REG8[5]) # !B[4] & !A1L73 & C1_REG8[5];
C1_REG8[4] = DFFEA(C1_REG8[4]_lut_out, GLOBAL(B1L1), VCC, , , , );


--C1_REG8[5] is SREG8B:U2|REG8[5] at LC_X1_Y15_N6
--operation mode is normal

C1_REG8[5]_lut_out = B[5] & (A1L73 # C1_REG8[6]) # !B[5] & !A1L73 & C1_REG8[6];
C1_REG8[5] = DFFEA(C1_REG8[5]_lut_out, GLOBAL(B1L1), VCC, , , , );


--C1_REG8[6] is SREG8B:U2|REG8[6] at LC_X1_Y15_N3
--operation mode is normal

C1_REG8[6]_lut_out = B[6] & (A1L73 # C1_REG8[7]) # !B[6] & !A1L73 & C1_REG8[7];
C1_REG8[6] = DFFEA(C1_REG8[6]_lut_out, GLOBAL(B1L1), VCC, , , , );


--C1_REG8[7] is SREG8B:U2|REG8[7] at LC_X1_Y15_N5
--operation mode is normal

C1_REG8[7]_sload_eqn = B[7];
C1_REG8[7] = DFFEA(C1_REG8[7]_sload_eqn, GLOBAL(B1L1), VCC, , A1L73, , );


--CLKK is CLKK at PIN_28
--operation mode is input

CLKK = INPUT();


--A[7] is A[7] at PIN_240
--operation mode is input

A[7] = INPUT();


--A[6] is A[6] at PIN_239
--operation mode is input

A[6] = INPUT();


--A[5] is A[5] at PIN_238
--operation mode is input

A[5] = INPUT();


--A[4] is A[4] at PIN_237
--operation mode is input

A[4] = INPUT();


--A[3] is A[3] at PIN_236
--operation mode is input

A[3] = INPUT();


--A[2] is A[2] at PIN_235
--operation mode is input

A[2] = INPUT();


--A[1] is A[1] at PIN_234
--operation mode is input

A[1] = INPUT();


--A[0] is A[0] at PIN_233
--operation mode is input

A[0] = INPUT();


--START is START at PIN_173
--operation mode is input

START = INPUT();


--B[0] is B[0] at PIN_1
--operation mode is input

B[0] = INPUT();


--B[1] is B[1] at PIN_2
--operation mode is input

B[1] = INPUT();


--B[2] is B[2] at PIN_3
--operation mode is input

B[2] = INPUT();


--B[3] is B[3] at PIN_4
--operation mode is input

B[3] = INPUT();


--B[4] is B[4] at PIN_6
--operation mode is input

B[4] = INPUT();


--B[5] is B[5] at PIN_7
--operation mode is input

B[5] = INPUT();


--B[6] is B[6] at PIN_8
--operation mode is input

B[6] = INPUT();


--B[7] is B[7] at PIN_12
--operation mode is input

B[7] = INPUT();


--DOUT[15] is DOUT[15] at PIN_136
--operation mode is output

DOUT[15] = OUTPUT(F1_R16S[15]);


--DOUT[14] is DOUT[14] at PIN_135
--operation mode is output

DOUT[14] = OUTPUT(F1_R16S[14]);


--DOUT[13] is DOUT[13] at PIN_134
--operation mode is output

DOUT[13] = OUTPUT(F1_R16S[13]);


--DOUT[12] is DOUT[12] at PIN_133
--operation mode is output

DOUT[12] = OUTPUT(F1_R16S[12]);


--DOUT[11] is DOUT[11] at PIN_132
--operation mode is output

DOUT[11] = OUTPUT(F1_R16S[11]);


--DOUT[10] is DOUT[10] at PIN_128
--operation mode is output

DOUT[10] = OUTPUT(F1_R16S[10]);


--DOUT[9] is DOUT[9] at PIN_41
--operation mode is output

DOUT[9] = OUTPUT(F1_R16S[9]);


--DOUT[8] is DOUT[8] at PIN_21
--operation mode is output

DOUT[8] = OUTPUT(F1_R16S[8]);


--DOUT[7] is DOUT[7] at PIN_20
--operation mode is output

DOUT[7] = OUTPUT(F1_R16S[7]);


--DOUT[6] is DOUT[6] at PIN_19
--operation mode is output

DOUT[6] = OUTPUT(F1_R16S[6]);


--DOUT[5] is DOUT[5] at PIN_18
--operation mode is output

DOUT[5] = OUTPUT(F1_R16S[5]);


--DOUT[4] is DOUT[4] at PIN_17
--operation mode is output

DOUT[4] = OUTPUT(F1_R16S[4]);


--DOUT[3] is DOUT[3] at PIN_16
--operation mode is output

DOUT[3] = OUTPUT(F1_R16S[3]);


--DOUT[2] is DOUT[2] at PIN_15
--operation mode is output

DOUT[2] = OUTPUT(F1_R16S[2]);


--DOUT[1] is DOUT[1] at PIN_14
--operation mode is output

DOUT[1] = OUTPUT(F1_R16S[1]);


--DOUT[0] is DOUT[0] at PIN_13
--operation mode is output

DOUT[0] = OUTPUT(F1_R16S[0]);