resv.fit.eqn

基于fpga和sopc的用VHDL语言编写的EDA数据采集电路和简易存储示波器

Q1_Q[3] = AMPP_FUNCTION(A1L7, Q3_Q[0], Q2_Q[3], Q6_Q[3], !E1L2, E1L91);


--J1L33 is RAM8B:inst1|altsyncram:altsyncram_component|altsyncram_1p01:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_incr_addr~44 at LC_X13_Y7_N2
--operation mode is normal

J1L33 = AMPP_FUNCTION(N1_safe_q[3], N1_safe_q[2], N1_safe_q[0]);


--J1L9 is RAM8B:inst1|altsyncram:altsyncram_component|altsyncram_1p01:auto_generated|sld_mod_ram_rom:mgl_prim2|process1~3 at LC_X14_Y7_N9
--operation mode is normal

J1L9 = AMPP_FUNCTION(Q1_Q[1], J1L33, Q1_Q[3], N1_safe_q[1]);


--J1L11 is RAM8B:inst1|altsyncram:altsyncram_component|altsyncram_1p01:auto_generated|sld_mod_ram_rom:mgl_prim2|process5~12 at LC_X13_Y8_N7
--operation mode is normal

J1L11 = AMPP_FUNCTION(E1_jtag_debug_mode_usr1, Q1_Q[3], E1L62);


--J1L31 is RAM8B:inst1|altsyncram:altsyncram_component|altsyncram_1p01:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~820 at LC_X13_Y9_N4
--operation mode is normal

J1L31 = AMPP_FUNCTION(M1_safe_q[0], T1_state[4], J1L11, M1_safe_q[1]);


--Q1_Q[0] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[0] at LC_X14_Y9_N7
--operation mode is normal

Q1_Q[0] = AMPP_FUNCTION(A1L7, Q3_Q[0], Q2_Q[0], Q6_Q[0], !E1L2, E1L91);


--J1_ram_rom_incr_addr is RAM8B:inst1|altsyncram:altsyncram_component|altsyncram_1p01:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_incr_addr at LC_X13_Y7_N9
--operation mode is normal

J1_ram_rom_incr_addr = AMPP_FUNCTION(Q1_Q[1], J1L23, J1L33, N1_safe_q[1]);


--J1L41 is RAM8B:inst1|altsyncram:altsyncram_component|altsyncram_1p01:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~821 at LC_X13_Y9_N6
--operation mode is normal

J1L41 = AMPP_FUNCTION(M1_safe_q[2], T1_state[4], J1L11, M1_safe_q[1]);


--J1L51 is RAM8B:inst1|altsyncram:altsyncram_component|altsyncram_1p01:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~822 at LC_X11_Y7_N5
--operation mode is normal

J1L51 = AMPP_FUNCTION(M1_safe_q[3], T1_state[4], M1_safe_q[2], J1L11);


--J1L61 is RAM8B:inst1|altsyncram:altsyncram_component|altsyncram_1p01:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~823 at LC_X11_Y7_N8
--operation mode is normal

J1L61 = AMPP_FUNCTION(M1_safe_q[3], M1_safe_q[4], J1L11, T1_state[4]);


--J1L71 is RAM8B:inst1|altsyncram:altsyncram_component|altsyncram_1p01:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~824 at LC_X12_Y7_N9
--operation mode is normal

J1L71 = AMPP_FUNCTION(T1_state[4], M1_safe_q[5], M1_safe_q[4], J1L11);


--J1L81 is RAM8B:inst1|altsyncram:altsyncram_component|altsyncram_1p01:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~825 at LC_X13_Y8_N5
--operation mode is normal

J1L81 = AMPP_FUNCTION(T1_state[4], M1_safe_q[5], J1L11, M1_safe_q[6]);


--J1L91 is RAM8B:inst1|altsyncram:altsyncram_component|altsyncram_1p01:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~826 at LC_X13_Y8_N8
--operation mode is normal

J1L91 = AMPP_FUNCTION(T1_state[4], M1_safe_q[7], J1L11, M1_safe_q[6]);


--J1L02 is RAM8B:inst1|altsyncram:altsyncram_component|altsyncram_1p01:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~827 at LC_X13_Y8_N4
--operation mode is normal

J1L02 = AMPP_FUNCTION(J1L11, M1_safe_q[7], M1_safe_q[8], T1_state[4]);


--J1L12 is RAM8B:inst1|altsyncram:altsyncram_component|altsyncram_1p01:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~828 at LC_X13_Y8_N1
--operation mode is normal

J1L12 = AMPP_FUNCTION(altera_internal_jtag, M1_safe_q[8], J1L11, T1_state[4]);


--Q6_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[0] at LC_X11_Y9_N5
--operation mode is normal

Q6_Q[0] = AMPP_FUNCTION(A1L7, J1_is_in_use_reg, Q6_Q[0], Q6_Q[1], E1L61, !E1L2, T1_state[4], E1_IRSR_ENA);


--K2_WORD_SR[0] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0] at LC_X10_Y8_N5
--operation mode is normal

K2_WORD_SR[0] = AMPP_FUNCTION(A1L7, T1_state[4], K2L91, K2_word_counter[4], K2_WORD_SR[1], !K1_clear_signal, E1L4);


--U1_dffe1a[0] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_9ie:auto_generated|dffe1a[0] at LC_X11_Y8_N3
--operation mode is normal

U1_dffe1a[0] = AMPP_FUNCTION(A1L7, E1L42, Q6_Q[3], Q6_Q[1], Q6_Q[2], !E1L2, E1L7);


--E1L31 is sld_hub:sld_hub_inst|HUB_TDO~342 at LC_X10_Y8_N7
--operation mode is normal

E1L31 = AMPP_FUNCTION(U1_dffe1a[0], K2_WORD_SR[0], Q5_Q[0]);

--E1_HUB_BYPASS_REG is sld_hub:sld_hub_inst|HUB_BYPASS_REG at LC_X10_Y8_N7
--operation mode is normal

E1_HUB_BYPASS_REG = AMPP_FUNCTION(A1L7, E1L01, VCC, GND);


--E1L41 is sld_hub:sld_hub_inst|HUB_TDO~343 at LC_X13_Y8_N2
--operation mode is normal

E1L41 = AMPP_FUNCTION(Q1_Q[1], J1_ram_rom_data_reg[0], Q1_Q[2]);

--J1_bypass_reg_out is RAM8B:inst1|altsyncram:altsyncram_component|altsyncram_1p01:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out at LC_X13_Y8_N2
--operation mode is normal

J1_bypass_reg_out = AMPP_FUNCTION(A1L7, altera_internal_jtag, !E1L2, GND, E1L62);


--K1_WORD_SR[0] is RAM8B:inst1|altsyncram:altsyncram_component|altsyncram_1p01:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[0] at LC_X12_Y9_N8
--operation mode is normal

K1_WORD_SR[0] = AMPP_FUNCTION(A1L7, K1_word_counter[4], K1L91, K1_WORD_SR[1], K1L02, !K1_clear_signal, T1_state[4], J1L8);


--E1L11 is sld_hub:sld_hub_inst|HUB_TDO~339 at LC_X14_Y8_N2
--operation mode is normal

E1L11 = AMPP_FUNCTION(Q1_Q[0], K1_WORD_SR[0], E1L41);

--Q4_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] at LC_X14_Y8_N2
--operation mode is normal

Q4_Q[0] = AMPP_FUNCTION(A1L7, altera_internal_jtag, !E1L2, GND, E1L71);


--T1_state[8] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[8] at LC_X13_Y9_N7
--operation mode is normal

T1_state[8] = AMPP_FUNCTION(A1L7, T1_state[5], A1L9, T1_state[7], VCC);


--T1_state[3] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] at LC_X10_Y8_N4
--operation mode is normal

T1_state[3] = AMPP_FUNCTION(A1L7, A1L9, T1_state[2], VCC);


--E1L92 is sld_hub:sld_hub_inst|process12~0 at LC_X14_Y8_N6
--operation mode is normal

E1L92 = AMPP_FUNCTION(T1_state[3], T1_state[4]);


--E1L8 is sld_hub:sld_hub_inst|GEN_SHADOW_IRF~0 at LC_X14_Y8_N5
--operation mode is normal

E1L8 = AMPP_FUNCTION(Q4_Q[0], E1_OK_TO_UPDATE_IR_Q, T1_state[5]);


--J1_ir_loaded_address_reg[1] is RAM8B:inst1|altsyncram:altsyncram_component|altsyncram_1p01:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1] at LC_X13_Y9_N0
--operation mode is normal

J1_ir_loaded_address_reg[1] = AMPP_FUNCTION(A1L7, M1_safe_q[1], !Q1_Q[0], J1L21);


--Q6_Q[3] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[3] at LC_X11_Y9_N8
--operation mode is normal

Q6_Q[3] = AMPP_FUNCTION(A1L7, J1_ir_loaded_address_reg[2], Q6_Q[3], Q6_Q[4], E1L61, !E1L2, T1_state[4], E1_IRSR_ENA);


--U1_dffe1a[3] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_9ie:auto_generated|dffe1a[3] at LC_X11_Y8_N7
--operation mode is normal

U1_dffe1a[3] = AMPP_FUNCTION(A1L7, E1L42, Q6_Q[3], Q6_Q[1], Q6_Q[2], !E1L2, E1L7);


--E1L61 is sld_hub:sld_hub_inst|IR_MUX_SEL~7 at LC_X14_Y9_N8
--operation mode is normal

E1L61 = AMPP_FUNCTION(U1_dffe1a[3], Q6_Q[5], Q6_Q[3]);


--E1_IRSR_ENA is sld_hub:sld_hub_inst|IRSR_ENA at LC_X11_Y9_N7
--operation mode is normal

E1_IRSR_ENA = AMPP_FUNCTION(T1_state[4], T1_state[3], E1_jtag_debug_mode_usr1);


--U1_dffe1a[1] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_9ie:auto_generated|dffe1a[1] at LC_X11_Y8_N1
--operation mode is normal

U1_dffe1a[1] = AMPP_FUNCTION(A1L7, E1L42, Q6_Q[3], Q6_Q[1], Q6_Q[2], !E1L2, E1L7);


--E1L5 is sld_hub:sld_hub_inst|comb~66 at LC_X14_Y8_N1
--operation mode is normal

E1L5 = AMPP_FUNCTION(E1_OK_TO_UPDATE_IR_Q, T1_state[8]);


--E1L1 is sld_hub:sld_hub_inst|BROADCAST_ENA~27 at LC_X14_Y8_N4
--operation mode is normal

E1L1 = AMPP_FUNCTION(U1_dffe1a[2], U1_dffe1a[1], Q5_Q[0], E1L5);


--U1_dffe1a[7] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_9ie:auto_generated|dffe1a[7] at LC_X11_Y8_N2
--operation mode is normal

U1_dffe1a[7] = AMPP_FUNCTION(A1L7, E1L42, Q6_Q[3], Q6_Q[1], Q6_Q[2], !E1L2, E1L7);


--E1L3 is sld_hub:sld_hub_inst|comb~6 at LC_X14_Y8_N8
--operation mode is normal

E1L3 = AMPP_FUNCTION(E1_OK_TO_UPDATE_IR_Q, Q3_Q[0], T1_state[8]);


--T1_state[0] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[0] at LC_X11_Y10_N3
--operation mode is normal

T1_s