adcint.map.summary

基于fpga和sopc的用VHDL语言编写的EDA的ADC0809采样控制电路

Flow Status : Successful - Tue Aug 02 07:26:33 2005
Quartus II Version : 4.1 Build 181 06/29/2004 SJ Full Version
Revision Name : ADCINT
Top-level Entity Name : ADCINT
Family : Cyclone
Device : EP1C6Q240C8
Timing Models : Production
Total logic elements : 14
Total pins : 23
Total memory bits : 0
Total PLLs : 0