singt.map.summary

基于fpga和sopc的用VHDL语言编写的EDA正弦信号发生器

Flow Status : Successful - Tue Aug 02 07:08:56 2005
Quartus II Version : 4.1 Build 181 06/29/2004 SJ Full Version
Revision Name : SINGT
Top-level Entity Name : SINGT
Family : Cyclone
Device : EP1C6Q240C8
Timing Models : Production
Total logic elements : 498
Total pins : 13
Total memory bits : 14,848
Total PLLs : 0