dvf.qsf

基于fpga和sopc的用VHDL语言编写的EDA数控分频器

# Copyright (C) 1991-2004 Altera Corporation
# Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
# support information,  device programming or simulation file,  and any other
# associated  documentation or information  provided by  Altera  or a partner
# under  Altera's   Megafunction   Partnership   Program  may  be  used  only
# to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
# other  use  of such  megafunction  design,  netlist,  support  information,
# device programming or simulation file,  or any other  related documentation
# or information  is prohibited  for  any  other purpose,  including, but not
# limited to  modification,  reverse engineering,  de-compiling, or use  with
# any other  silicon devices,  unless such use is  explicitly  licensed under
# a separate agreement with  Altera  or a megafunction partner.  Title to the
# intellectual property,  including patents,  copyrights,  trademarks,  trade
# secrets,  or maskworks,  embodied in any such megafunction design, netlist,
# support  information,  device programming or simulation file,  or any other
# related documentation or information provided by  Altera  or a megafunction
# partner, remains with Altera, the megafunction partner, or their respective
# licensors. No other licenses, including any licenses needed under any third
# party's intellectual property, are provided herein.


# The default values for assignments are stored in the file
#		DVF_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 4.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "13:01:50  FEBRUARY 02, 2005"
set_global_assignment -name LAST_QUARTUS_VERSION 4.1
set_global_assignment -name VHDL_FILE DVF.vhd
set_global_assignment -name SIGNALTAP_FILE stp1.stp

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_28 -to CLK
set_location_assignment PIN_174 -to FOUT
set_location_assignment PIN_233 -to D\[0\]
set_location_assignment PIN_234 -to D\[1\]
set_location_assignment PIN_235 -to D\[2\]
set_location_assignment PIN_236 -to D\[3\]
set_location_assignment PIN_237 -to D\[4\]
set_location_assignment PIN_238 -to D\[5\]
set_location_assignment PIN_239 -to D\[6\]
set_location_assignment PIN_240 -to D\[7\]

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name SPEED_DISK_USAGE_TRADEOFF SMART
set_global_assignment -name DEVICE_FILTER_PACKAGE PQFP
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 240
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_global_assignment -name FAMILY Cyclone
set_global_assignment -name TOP_LEVEL_ENTITY DVF

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EP1C6Q240C8

# SignalTap II Assignments
# ========================
set_global_assignment -name ENABLE_SIGNALTAP On
set_global_assignment -name USE_SIGNALTAP_FILE stp1.stp
set_instance_assignment -name STP_INCREMENTAL_SOURCE D\[0\] -to altera_reserved_0_acq_trigger_in\[0\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_acq_trigger_in\[0\]
set_instance_assignment -name STP_INCREMENTAL_SOURCE D\[1\] -to altera_reserved_0_acq_trigger_in\[1\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_acq_trigger_in\[1\]
set_instance_assignment -name STP_INCREMENTAL_SOURCE D\[2\] -to altera_reserved_0_acq_trigger_in\[2\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_acq_trigger_in\[2\]
set_instance_assignment -name STP_INCREMENTAL_SOURCE D\[3\] -to altera_reserved_0_acq_trigger_in\[3\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_acq_trigger_in\[3\]
set_instance_assignment -name STP_INCREMENTAL_SOURCE D\[4\] -to altera_reserved_0_acq_trigger_in\[4\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_acq_trigger_in\[4\]
set_instance_assignment -name STP_INCREMENTAL_SOURCE D\[5\] -to altera_reserved_0_acq_trigger_in\[5\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_acq_trigger_in\[5\]
set_instance_assignment -name STP_INCREMENTAL_SOURCE D\[6\] -to altera_reserved_0_acq_trigger_in\[6\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_acq_trigger_in\[6\]
set_instance_assignment -name STP_INCREMENTAL_SOURCE D\[7\] -to altera_reserved_0_acq_trigger_in\[7\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_acq_trigger_in\[7\]
set_instance_assignment -name STP_INCREMENTAL_SOURCE FOUT -to altera_reserved_0_acq_trigger_in\[8\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_acq_trigger_in\[8\]
set_instance_assignment -name STP_INCREMENTAL_SOURCE D\[0\] -to altera_reserved_0_acq_data_in\[0\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_acq_data_in\[0\]
set_instance_assignment -name STP_INCREMENTAL_SOURCE D\[1\] -to altera_reserved_0_acq_data_in\[1\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_acq_data_in\[1\]
set_instance_assignment -name STP_INCREMENTAL_SOURCE D\[2\] -to altera_reserved_0_acq_data_in\[2\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_acq_data_in\[2\]
set_instance_assignment -name STP_INCREMENTAL_SOURCE D\[3\] -to altera_reserved_0_acq_data_in\[3\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_acq_data_in\[3\]
set_instance_assignment -name STP_INCREMENTAL_SOURCE D\[4\] -to altera_reserved_0_acq_data_in\[4\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_acq_data_in\[4\]
set_instance_assignment -name STP_INCREMENTAL_SOURCE D\[5\] -to altera_reserved_0_acq_data_in\[5\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_acq_data_in\[5\]
set_instance_assignment -name STP_INCREMENTAL_SOURCE D\[6\] -to altera_reserved_0_acq_data_in\[6\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_acq_data_in\[6\]
set_instance_assignment -name STP_INCREMENTAL_SOURCE D\[7\] -to altera_reserved_0_acq_data_in\[7\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_acq_data_in\[7\]
set_instance_assignment -name STP_INCREMENTAL_SOURCE FOUT -to altera_reserved_0_acq_data_in\[8\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_acq_data_in\[8\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_crc_pin\[0\]
set_instance_assignment -name STP_INCREMENTAL_SOURCE GND -to altera_reserved_0_crc_pin\[0\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_crc_pin\[1\]
set_instance_assignment -name STP_INCREMENTAL_SOURCE GND -to altera_reserved_0_crc_pin\[1\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_crc_pin\[2\]
set_instance_assignment -name STP_INCREMENTAL_SOURCE VCC -to altera_reserved_0_crc_pin\[2\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_crc_pin\[3\]
set_instance_assignment -name STP_INCREMENTAL_SOURCE GND -to altera_reserved_0_crc_pin\[3\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_crc_pin\[4\]
set_instance_assignment -name STP_INCREMENTAL_SOURCE VCC -to altera_reserved_0_crc_pin\[4\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_crc_pin\[5\]
set_instance_assignment -name STP_INCREMENTAL_SOURCE GND -to altera_reserved_0_crc_pin\[5\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_crc_pin\[6\]
set_instance_assignment -name STP_INCREMENTAL_SOURCE VCC -to altera_reserved_0_crc_pin\[6\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_crc_pin\[7\]
set_instance_assignment -name STP_INCREMENTAL_SOURCE GND -to altera_reserved_0_crc_pin\[7\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_crc_pin\[8\]
set_instance_assignment -name STP_INCREMENTAL_SOURCE GND -to altera_reserved_0_crc_pin\[8\]
set_instance_assignment -name STP_VIRTUAL_PIN ON -to altera_reserved_0_crc_pin\[9\]
set_instance_assignment -name STP_INCREMENTAL_SOURCE VCC -to altera_reserved_0_crc_pin\[9\]