scan_led.fit.eqn

基于fpga和sopc的用VHDL语言编写的EDA8段数码显示译码器

--CNT8[2] is CNT8[2] at LC_X34_Y16_N0
--operation mode is normal

CNT8[2]_lut_out = !CNT8[2];
CNT8[2] = DFFEA(CNT8[2]_lut_out, GLOBAL(CLK), VCC, , A1L1, , );


--CNT8[0] is CNT8[0] at LC_X34_Y16_N2
--operation mode is normal

CNT8[0]_lut_out = !CNT8[0];
CNT8[0] = DFFEA(CNT8[0]_lut_out, GLOBAL(CLK), VCC, , , , );


--CNT8[1] is CNT8[1] at LC_X34_Y16_N5
--operation mode is normal

CNT8[1]_lut_out = CNT8[0] $ CNT8[1];
CNT8[1] = DFFEA(CNT8[1]_lut_out, GLOBAL(CLK), VCC, , , , );


--A1L32 is Mux~91 at LC_X34_Y16_N3
--operation mode is normal

A1L32 = CNT8[2] # CNT8[0] $ CNT8[1];


--A1L42 is Mux~92 at LC_X34_Y16_N4
--operation mode is normal

A1L42 = CNT8[2] $ (!CNT8[0] & CNT8[1]);


--A1L52 is Mux~93 at LC_X34_Y16_N6
--operation mode is normal

A1L52 = !CNT8[0] & !CNT8[1] # !CNT8[2];


--A1L62 is Mux~291 at LC_X34_Y16_N1
--operation mode is normal

A1L62 = CNT8[0] & !CNT8[1] # !CNT8[0] & (CNT8[1] # CNT8[2]);


--A1L22 is Mux~55 at LC_X34_Y16_N8
--operation mode is normal

A1L22 = CNT8[0] & CNT8[1] & CNT8[2];


--A1L72 is Mux~292 at LC_X34_Y16_N7
--operation mode is normal

A1L72 = CNT8[0] & CNT8[2] # !CNT8[0] & CNT8[1] & !CNT8[2];


--A1L82 is Mux~293 at LC_X34_Y15_N8
--operation mode is normal

A1L82 = CNT8[1] & !CNT8[0] & CNT8[2] # !CNT8[1] & (CNT8[0] $ !CNT8[2]);


--A1L12 is Mux~54 at LC_X34_Y15_N3
--operation mode is normal

A1L12 = CNT8[1] & !CNT8[0] & CNT8[2];


--A1L02 is Mux~53 at LC_X34_Y15_N6
--operation mode is normal

A1L02 = !CNT8[1] & CNT8[0] & CNT8[2];


--A1L91 is Mux~52 at LC_X34_Y15_N9
--operation mode is normal

A1L91 = !CNT8[1] & !CNT8[0] & CNT8[2];


--A1L81 is Mux~51 at LC_X34_Y15_N7
--operation mode is normal

A1L81 = CNT8[1] & CNT8[0] & !CNT8[2];


--A1L71 is Mux~50 at LC_X34_Y15_N4
--operation mode is normal

A1L71 = CNT8[1] & !CNT8[0] & !CNT8[2];


--A1L92 is Mux~294 at LC_X34_Y15_N2
--operation mode is normal

A1L92 = !CNT8[1] & CNT8[0] & !CNT8[2];


--A1L61 is Mux~48 at LC_X34_Y15_N5
--operation mode is normal

A1L61 = !CNT8[1] & !CNT8[0] & !CNT8[2];


--A1L1 is add~31 at LC_X34_Y16_N9
--operation mode is normal

A1L1 = CNT8[0] & CNT8[1];


--CLK is CLK at PIN_28
--operation mode is input

CLK = INPUT();


--SG[6] is SG[6] at PIN_164
--operation mode is output

SG[6] = OUTPUT(A1L32);


--SG[5] is SG[5] at PIN_165
--operation mode is output

SG[5] = OUTPUT(A1L42);


--SG[4] is SG[4] at PIN_166
--operation mode is output

SG[4] = OUTPUT(!A1L52);


--SG[3] is SG[3] at PIN_167
--operation mode is output

SG[3] = OUTPUT(A1L62);


--SG[2] is SG[2] at PIN_168
--operation mode is output

SG[2] = OUTPUT(!A1L22);


--SG[1] is SG[1] at PIN_169
--operation mode is output

SG[1] = OUTPUT(!A1L72);


--SG[0] is SG[0] at PIN_173
--operation mode is output

SG[0] = OUTPUT(!A1L82);


--BT[7] is BT[7] at PIN_139
--operation mode is output

BT[7] = OUTPUT(A1L22);


--BT[6] is BT[6] at PIN_140
--operation mode is output

BT[6] = OUTPUT(A1L12);


--BT[5] is BT[5] at PIN_141
--operation mode is output

BT[5] = OUTPUT(A1L02);


--BT[4] is BT[4] at PIN_158
--operation mode is output

BT[4] = OUTPUT(A1L91);


--BT[3] is BT[3] at PIN_159
--operation mode is output

BT[3] = OUTPUT(A1L81);


--BT[2] is BT[2] at PIN_160
--operation mode is output

BT[2] = OUTPUT(A1L71);


--BT[1] is BT[1] at PIN_161
--operation mode is output

BT[1] = OUTPUT(A1L92);


--BT[0] is BT[0] at PIN_162
--operation mode is output

BT[0] = OUTPUT(A1L61);