📄 translator_shift.rpt
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_EQ039 = !_LC5_A21 & q_out21
# _LC5_A21 & _LC6_C24;
-- Node name is ':15'
-- Equation name is '_LC2_C24', type is buried
_LC2_C24 = DFFE( _EQ040, GLOBAL( clk), VCC, VCC, VCC);
_EQ040 = !_LC5_A21 & q_out20
# _LC2_C24 & _LC5_A21;
-- Node name is ':17'
-- Equation name is '_LC4_C24', type is buried
_LC4_C24 = DFFE( _EQ041, GLOBAL( clk), VCC, VCC, VCC);
_EQ041 = !_LC5_A21 & q_out19
# _LC4_C24 & _LC5_A21;
-- Node name is ':19'
-- Equation name is '_LC1_C17', type is buried
_LC1_C17 = DFFE( _EQ042, GLOBAL( clk), VCC, VCC, VCC);
_EQ042 = !_LC5_A21 & q_out18
# _LC1_C17 & _LC5_A21;
-- Node name is ':21'
-- Equation name is '_LC4_C17', type is buried
_LC4_C17 = DFFE( _EQ043, GLOBAL( clk), VCC, VCC, VCC);
_EQ043 = !_LC5_A21 & q_out17
# _LC4_C17 & _LC5_A21;
-- Node name is ':23'
-- Equation name is '_LC1_C21', type is buried
_LC1_C21 = DFFE( _EQ044, GLOBAL( clk), VCC, VCC, VCC);
_EQ044 = !_LC5_A21 & q_out16
# _LC1_C21 & _LC5_A21;
-- Node name is ':25'
-- Equation name is '_LC5_C17', type is buried
_LC5_C17 = DFFE( _EQ045, GLOBAL( clk), VCC, VCC, VCC);
_EQ045 = !_LC5_A21 & q_out15
# _LC5_A21 & _LC5_C17;
-- Node name is ':27'
-- Equation name is '_LC3_A17', type is buried
_LC3_A17 = DFFE( _EQ046, GLOBAL( clk), VCC, VCC, VCC);
_EQ046 = !_LC5_A21 & q_out14
# _LC3_A17 & _LC5_A21;
-- Node name is ':29'
-- Equation name is '_LC8_A18', type is buried
_LC8_A18 = DFFE( _EQ047, GLOBAL( clk), VCC, VCC, VCC);
_EQ047 = !_LC5_A21 & q_out13
# _LC5_A21 & _LC8_A18;
-- Node name is ':31'
-- Equation name is '_LC1_A16', type is buried
_LC1_A16 = DFFE( _EQ048, GLOBAL( clk), VCC, VCC, VCC);
_EQ048 = !_LC5_A21 & q_out12
# _LC1_A16 & _LC5_A21;
-- Node name is ':33'
-- Equation name is '_LC8_A13', type is buried
_LC8_A13 = DFFE( _EQ049, GLOBAL( clk), VCC, VCC, VCC);
_EQ049 = !_LC5_A21 & q_out11
# _LC5_A21 & _LC8_A13;
-- Node name is ':35'
-- Equation name is '_LC3_A13', type is buried
_LC3_A13 = DFFE( _EQ050, GLOBAL( clk), VCC, VCC, VCC);
_EQ050 = !_LC5_A21 & q_out10
# _LC3_A13 & _LC5_A21;
-- Node name is ':37'
-- Equation name is '_LC1_A13', type is buried
_LC1_A13 = DFFE( _EQ051, GLOBAL( clk), VCC, VCC, VCC);
_EQ051 = !_LC5_A21 & q_out9
# _LC1_A13 & _LC5_A21;
-- Node name is ':39'
-- Equation name is '_LC4_A13', type is buried
_LC4_A13 = DFFE( _EQ052, GLOBAL( clk), VCC, VCC, VCC);
_EQ052 = !_LC5_A21 & q_out8
# _LC4_A13 & _LC5_A21;
-- Node name is ':41'
-- Equation name is '_LC3_B20', type is buried
_LC3_B20 = DFFE( _EQ053, GLOBAL( clk), VCC, VCC, VCC);
_EQ053 = !_LC5_A21 & q_out7
# _LC3_B20 & _LC5_A21;
-- Node name is ':43'
-- Equation name is '_LC5_B20', type is buried
_LC5_B20 = DFFE( _EQ054, GLOBAL( clk), VCC, VCC, VCC);
_EQ054 = !_LC5_A21 & q_out6
# _LC5_A21 & _LC5_B20;
-- Node name is ':45'
-- Equation name is '_LC1_B20', type is buried
_LC1_B20 = DFFE( _EQ055, GLOBAL( clk), VCC, VCC, VCC);
_EQ055 = !_LC5_A21 & q_out5
# _LC1_B20 & _LC5_A21;
-- Node name is ':47'
-- Equation name is '_LC2_B20', type is buried
_LC2_B20 = DFFE( _EQ056, GLOBAL( clk), VCC, VCC, VCC);
_EQ056 = !_LC5_A21 & q_out4
# _LC2_B20 & _LC5_A21;
-- Node name is ':49'
-- Equation name is '_LC5_B13', type is buried
_LC5_B13 = DFFE( _EQ057, GLOBAL( clk), VCC, VCC, VCC);
_EQ057 = !_LC5_A21 & q_out3
# _LC5_A21 & _LC5_B13;
-- Node name is ':51'
-- Equation name is '_LC1_B13', type is buried
_LC1_B13 = DFFE( _EQ058, GLOBAL( clk), VCC, VCC, VCC);
_EQ058 = !_LC5_A21 & q_out2
# _LC1_B13 & _LC5_A21;
-- Node name is ':53'
-- Equation name is '_LC4_B13', type is buried
_LC4_B13 = DFFE( _EQ059, GLOBAL( clk), VCC, VCC, VCC);
_EQ059 = !_LC5_A21 & q_out1
# _LC4_B13 & _LC5_A21;
-- Node name is ':55'
-- Equation name is '_LC7_B13', type is buried
_LC7_B13 = DFFE( _EQ060, GLOBAL( clk), VCC, VCC, VCC);
_EQ060 = !_LC5_A21 & q_out0
# _LC5_A21 & _LC7_B13;
-- Node name is ':60'
-- Equation name is '_LC7_A21', type is buried
_LC7_A21 = DFFE( _EQ061, GLOBAL( clk), VCC, VCC, VCC);
_EQ061 = _LC6_A21 & _LC7_A21
# _LC6_A21 & !_LC8_A21 & !x0;
-- Node name is ':146'
-- Equation name is '_LC6_A21', type is buried
_LC6_A21 = LCELL( _EQ062);
_EQ062 = !clr & _LC6_A21
# !clr & j_in;
-- Node name is ':155'
-- Equation name is '_LC2_A21', type is buried
_LC2_A21 = LCELL( _EQ063);
_EQ063 = !clr & j_in
# !clr & _LC2_A21;
-- Node name is ':203'
-- Equation name is '_LC2_C13', type is buried
!_LC2_C13 = _LC2_C13~NOT;
_LC2_C13~NOT = LCELL( _LC4_C13);
-- Node name is '~205~1'
-- Equation name is '~205~1', location is LC4_C13, type is buried.
-- synthesized logic cell
_LC4_C13 = LCELL( _EQ064);
_EQ064 = in_data3
# !in_data1
# !in_data0;
-- Node name is '~6319~1'
-- Equation name is '~6319~1', location is LC8_A21, type is buried.
-- synthesized logic cell
!_LC8_A21 = _LC8_A21~NOT;
_LC8_A21~NOT = LCELL( _EQ065);
_EQ065 = x1 & !x2 & x3 & x4;
-- Node name is '~6725~1'
-- Equation name is '~6725~1', location is LC5_A21, type is buried.
-- synthesized logic cell
_LC5_A21 = LCELL( _EQ066);
_EQ066 = _LC8_A21
# x0
# !_LC6_A21;
Project Information e:\bcode_s_m_h\translator_shift.rpt
** COMPILATION SETTINGS & TIMES **
Processing Menu Commands
------------------------
Design Doctor = off
Logic Synthesis:
Synthesis Type Used = Multi-Level
Default Synthesis Style = NORMAL
Logic option settings in 'NORMAL' style for 'FLEX10K' family
CARRY_CHAIN = ignore
CARRY_CHAIN_LENGTH = 32
CASCADE_CHAIN = ignore
CASCADE_CHAIN_LENGTH = 2
DECOMPOSE_GATES = on
DUPLICATE_LOGIC_EXTRACTION = on
MINIMIZATION = full
MULTI_LEVEL_FACTORING = on
NOT_GATE_PUSH_BACK = on
REDUCE_LOGIC = on
REFACTORIZATION = on
REGISTER_OPTIMIZATION = on
RESYNTHESIZE_NETWORK = on
SLOW_SLEW_RATE = off
SUBFACTOR_EXTRACTION = on
IGNORE_SOFT_BUFFERS = on
USE_LPM_FOR_AHDL_OPERATORS = off
Other logic synthesis settings:
Automatic Global Clock = on
Automatic Global Clear = on
Automatic Global Preset = on
Automatic Global Output Enable = on
Automatic Fast I/O = off
Automatic Register Packing = off
Automatic Open-Drain Pins = on
Automatic Implement in EAB = off
Optimize = 5
Default Timing Specifications: None
Cut All Bidir Feedback Timing Paths = on
Cut All Clear & Preset Timing Paths = on
Ignore Timing Assignments = off
Functional SNF Extractor = off
Linked SNF Extractor = off
Timing SNF Extractor = on
Optimize Timing SNF = off
Generate AHDL TDO File = off
Fitter Settings = NORMAL
Use Quartus Fitter = on
Smart Recompile = off
Total Recompile = off
Interfaces Menu Commands
------------------------
EDIF Netlist Writer = off
Verilog Netlist Writer = off
VHDL Netlist Writer = off
Compilation Times
-----------------
Compiler Netlist Extractor 00:00:00
Database Builder 00:00:00
Logic Synthesizer 00:00:01
Partitioner 00:00:01
Fitter 00:00:03
Timing SNF Extractor 00:00:00
Assembler 00:00:01
-------------------------- --------
Total Time 00:00:06
Memory Allocated
-----------------
Peak memory allocated during compilation = 23,754K
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