tc.inc

ATMEL公司的arm7处理器AT91R4008的库函数,我之前做的一个项目里面使用到的,在此网站上发现没有类似的资料,贡献给大家,能用到的最好.

#------------------------------------------------------------------------------
#-         ATMEL Microcontroller Software Support  -  ROUSSET  -
#------------------------------------------------------------------------------
# The software is delivered "AS IS" without warranty or condition of any
# kind, either express, implied or statutory. This includes without
# limitation any warranty or condition with respect to merchantability or
# fitness for any particular purpose, or against the infringements of
# intellectual property rights of others.
#------------------------------------------------------------------------------
#- File Name            : tc.inc
#- Object               : Assembler Timer Counter Definition File.
#-
#- 1.0 01/04/00 JCZ     : Creation
#------------------------------------------------------------------------------

#----------------------------------------------------
# Timer Counter  User Interface Structure Definition
#----------------------------------------------------
.equ		TC_CCR,       0x00           /* Channel Control Register */
.equ		TC_CMR,       0x04           /* Channel Mode Register */
#;                        0x08           /* Reserved 0 */
#;                        0x0C           /* Reserved 1 */
.equ		TC_CV,        0x10           /* Counter Value */
.equ		TC_RA,        0x14           /* Register A */
.equ		TC_RB,        0x18           /* Register B */
.equ		TC_RC,        0x1C           /* Register C */
.equ		TC_SR,        0x20           /* Status Register */
.equ		TC_IER,       0x24           /* Interrupt Enable Register */
.equ		TC_IDR,       0x28           /* Interrupt Disable Register */
.equ		TC_IMR,       0x2C           /* Interrupt Mask Register */
#;                        0x30           /* Reserved 2 */
#;                        0x34           /* Reserved 3 */
#;                        0x38           /* Reserved 4 */
#;                        0x3C           /* Reserved 5 */
.equ		TC_SIZE,      0x40

#------------------------------
# Timer Counter Block Structure
#------------------------------
.equ		NB_TC_CHANNEL,   3

.equ		TC0,          0
.equ		TC1,          TC_SIZE
.equ		TC2,          (TC_SIZE * 2)
.equ		TC_BCR,       (TC_SIZE * 3)
.equ		TC_BMR,       (TC_SIZE * 3 + 4)

#---------------------------------------------------------
#- TC_CCR: Timer Counter Control Register Bits Definition
#---------------------------------------------------------

.equ		TC_CLKEN,      0x1          /* Counter Clock Enable */
.equ		TC_CLKDIS,     0x2          /* Counter Clock Disable */
.equ		TC_SWTRG,      0x4          /* Software Trigger */

#------------------------------------------------------
#- TC_CMR: Timer Counter Mode Register Bits Definition
#------------------------------------------------------

.equ		TC_TCCLKS,     0x00000007      /* Clock Selection */
.equ		TC_CLKI,       0x00000008      /* Clock Inversion */
.equ		TC_BURST,      0x00000030      /* Burst Signal Selection */

.equ		TC_LDBSTOP,    0x00000040      /* Capture Mode : Counter Clock Stopped with RB Loading */
.equ		TC_CPCSTOP,    0x00000040      /* Waveform Mode : Counter Clock Stopped with RC Compare */

.equ		TC_LDBDIS,     0x00000080      /* Capture Mode : Counter Clock Disabled with RB Loading */
.equ		TC_CPCDIS,     0x00000080      /* Waveform Mode : Counter Clock Disabled with RC Compare */

.equ		TC_ETRGEDG,    0x00000300      /* Capture Mode : External Trigger Edge Selection */
.equ		TC_EEVTEDG,    0x00000300      /* Waveform Mode : External Event Edge Selection */

.equ		TC_ABETRG,     0x00000400      /* Capture Mode : TIOA or TIOB External Trigger Selection */

.equ		TC_EEVT,       0x00000C00      /* Waveform Mode : External Event Selection */
.equ		TC_ENETRG,     0x00001000      /* Waveform Mode : Enable Trigger on External Event */
.equ		TC_CPCTRG,     0x00004000      /* RC Compare Enable Trigger Enable */
.equ		TC_WAVE,       0x00008000      /* Mode Selection */
.equ		TC_LDRA,       0x00030000      /* Capture Mode : RA Loading Selection */
.equ		TC_ACPA,       0x00030000      /* Waveform Mode : RA Compare Effect on TIOA */
.equ		TC_LDRB,       0x000C0000      /* Capture Mode : RB Loading Selection */
.equ		TC_ACPC,       0x000C0000      /* Waveform Mode : RC Compare Effect on TIOA */
.equ		TC_AEEVT,      0x00300000      /* Waveform Mode : External Event Effect on TIOA */
.equ		TC_ASWTRG,     0x00C00000      /* Waveform Mode : Software Trigger Effect on TIOA */
.equ		TC_BCPB,       0x03000000      /* Waveform Mode : RB Compare Effect on TIOB */
.equ		TC_BCPC,       0x0C000000      /* Waveform Mode : RC Compare Effect on TIOB */
.equ		TC_BEEVT,      0x30000000      /* Waveform Mode : External Event Effect on TIOB */
.equ		TC_BSWTRG,     0xC0000000      /* Waveform Mode : Software Trigger Effect on TIOB */

#------------------------------------------------
#- TC_SR: Timer Counter Status Register Bits Definition
#------------------------------------------------

.equ		TC_COVFS,      0x01        /* Counter Overflow Status */
.equ		TC_LOVRS,      0x02        /* Load Overrun Status */
.equ		TC_CPAS,       0x04        /* RA Compare Status */
.equ		TC_CPBS,       0x08        /* RB Compare Status */
.equ		TC_CPCS,       0x10        /* RC Compare Status */
.equ		TC_LDRAS,      0x20        /* RA Loading Status */
.equ		TC_LDRBS,      0x40        /* RB Loading Status */
.equ		TC_ETRGS,      0x80        /* External Trigger Status */
.equ		TC_CLKSTA,     0x10000     /* Clock Status */
.equ		TC_MTIOA,      0x20000     /* TIOA Mirror */
.equ		TC_MTIOB,      0x40000     /* TIOB Status */

#----------------------------------------------------------------
#- TC_BCR: Timer Counter Block Control Register Bits Definition
#----------------------------------------------------------------

.equ		TC_SYNC,       0x1         /* Synchronisation Trigger */

#------------------------------------------------------------
#- TC_BMR: Timer Counter Block Mode Register Bits Definition
#------------------------------------------------------------

.equ		TC_TC0XC0S,    (0x3<<0)     /* External Clock Signal 0 Selection */
.equ		TC_TC1XC1S,    (0x3<<2)     /* External Clock Signal 1 Selection */
.equ		TC_TC2XC2S,    (0x3<<4)     /* External Clock Signal 2 Selection */

#- Timer Counter Channel Descriptor Structure
.equ		TCDesc_TCBase,         0x00       /* Peripheral base address */
.equ		TCDesc_PioCtrl,        0x04       /* IO controller descriptor */
.equ		TCDesc_AsmTCHandler,   0x08       /* Assembly interrupt handler */
.equ		TCDesc_TCHandler,      0x0C
.equ		TCDesc_PeriphId,       0x0D       /* Peripheral Identifier */
.equ		TCDesc_PioTioa,        0x0E       /* TIOA pin number in the PIO */
.equ		TCDesc_PioTiob,        0x0F       /* TIOB pin number in the PIO */
.equ		TCDesc_PioTclk,        0x10       /* TCLK pin number in the PIO */

#            END