main.asm

STM8S实验 ASM源程序

stm8/

	#include "mapping.inc"
	#include "STM8S105C_S.inc"  ;加入寄存器定义文件，具体定义在stm8s105c_s.asm中，需加入Source file中
	segment 'rom'
main.l
	; initialize SP
	ldw X,#stack_end
	ldw SP,X

	#ifdef RAM0	
	; clear RAM0
ram0_start.b EQU $ram0_segment_start
ram0_end.b EQU $ram0_segment_end
	ldw X,#ram0_start
clear_ram0.l
	clr (X)
	incw X
	cpw X,#ram0_end	
	jrule clear_ram0
	#endif

	#ifdef RAM1
	; clear RAM1
ram1_start.w EQU $ram1_segment_start
ram1_end.w EQU $ram1_segment_end	
	ldw X,#ram1_start
clear_ram1.l
	clr (X)
	incw X
	cpw X,#ram1_end	
	jrule clear_ram1
	#endif

	; clear stack
stack_start.w EQU $stack_segment_start
stack_end.w EQU $stack_segment_end
	ldw X,#stack_start
clear_stack.l
	clr (X)
	incw X
	cpw X,#stack_end	
	jrule clear_stack

  intel  ;intel格式的数值输入方式,不能顶格书写
				
				ld      a,#01
				and     a,CLK_CSSR;
				ld      CLK_CSSR,a;          CSEEN<-1,时钟安全系统使能
				
			  mov      CLK_ECKR,#01h       ; 允许外部高速振荡器工作
wait_hse_ready
        ld      a,CLK_ECKR
        and     a,#02h
        jreq    wait_hse_ready       ; 等待外部高速振荡器准备好
        mov     CLK_SWCR,#02h        ; SWEN <- 1
        mov     CLK_SWR,#0b4h        ; 选择芯片外部的高速振荡器为主时钟
wait_clk_switch
        ld      a,CLK_SWCR
        and     a,#08h
        jreq    wait_clk_switch    ; 等待切换成功
	
			  ld  a,#11111001b
        and a,CLK_CKDIVR;				
				ld  CLK_CKDIVR,a;
			
		
		    mov PC_DDR,#00000010b ;PC1为输出
		    mov PC_CR1,#00000010b ;PC1为推挽输出
		    mov PC_CR2,#00000000b ;
	
loop		
		    mov PC_ODR,#00000000b ;点亮led0
		    call delay 
		    mov PC_ODR,#00000010b ;熄灭led0
        call delay
		    jp loop 
		

delay
      ld   a,#15
next1 ldw  x,#0ffffh
next  decw x
		  jrne next
		  dec a
		  jrne next1
		  ret


	interrupt NonHandledInterrupt
NonHandledInterrupt.l
	iret
  motorola ;motorola格式的数值输入方式,不能顶格书写

  segment 'vectit'
	dc.l {$82000000+main}									; reset
	dc.l {$82000000+NonHandledInterrupt}	; trap
	dc.l {$82000000+NonHandledInterrupt}	; irq0
	dc.l {$82000000+NonHandledInterrupt}	; irq1
	dc.l {$82000000+NonHandledInterrupt}	; irq2
	dc.l {$82000000+NonHandledInterrupt}	; irq3
	dc.l {$82000000+NonHandledInterrupt}	; irq4
	dc.l {$82000000+NonHandledInterrupt}	; irq5
	dc.l {$82000000+NonHandledInterrupt}	; irq6
	dc.l {$82000000+NonHandledInterrupt}	; irq7
	dc.l {$82000000+NonHandledInterrupt}	; irq8
	dc.l {$82000000+NonHandledInterrupt}	; irq9
	dc.l {$82000000+NonHandledInterrupt}	; irq10
	dc.l {$82000000+NonHandledInterrupt}	; irq11
	dc.l {$82000000+NonHandledInterrupt}	; irq12
	dc.l {$82000000+NonHandledInterrupt}	; irq13
	dc.l {$82000000+NonHandledInterrupt}	; irq14
	dc.l {$82000000+NonHandledInterrupt}	; irq15
	dc.l {$82000000+NonHandledInterrupt}	; irq16
	dc.l {$82000000+NonHandledInterrupt}	; irq17
	dc.l {$82000000+NonHandledInterrupt}	; irq18
	dc.l {$82000000+NonHandledInterrupt}	; irq19
	dc.l {$82000000+NonHandledInterrupt}	; irq20
	dc.l {$82000000+NonHandledInterrupt}	; irq21
	dc.l {$82000000+NonHandledInterrupt}	; irq22
	dc.l {$82000000+NonHandledInterrupt}	; irq23
	dc.l {$82000000+NonHandledInterrupt}	; irq24
	dc.l {$82000000+NonHandledInterrupt}	; irq25
	dc.l {$82000000+NonHandledInterrupt}	; irq26
	dc.l {$82000000+NonHandledInterrupt}	; irq27
	dc.l {$82000000+NonHandledInterrupt}	; irq28
	dc.l {$82000000+NonHandledInterrupt}	; irq29

	end