main.c

在STR912上实现的uip

/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
* File Name          : main.c
* Author             : MCD Application Team
* Date First Issued  : May 2006
* Description        : Webserver Demo with uIP TCP-IP Stack
********************************************************************************
* History:
* May 2006: v1.0
* 06/19/06: v1.1
********************************************************************************
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/

/* Includes ------------------------------------------------------------------*/
#include "91x_lib.h"
#include "uip.h"
#include "LCD.h"

/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
const char disp_ln1[] = "STR91x DEMO";
const char disp_ln2[] = "ETHERNET TEST";
/* Private function prototypes -----------------------------------------------*/
int uIPMain(void);
/* Private functions ---------------------------------------------------------*/
int main()
{
u8 i;
#ifdef DEBUG
    debug();
#endif
 
  SCU_MCLKSourceConfig(SCU_MCLK_OSC);
  FMI_Config(FMI_READ_WAIT_STATE_2,FMI_WRITE_WAIT_STATE_0, FMI_PWD_ENABLE,\
             FMI_LVD_ENABLE,FMI_FREQ_HIGH);
  SCU_PLLFactorsConfig(192,25,2);            /* PLL = 96 MHz */
  SCU_PLLCmd(ENABLE);                        /* PLL Enabled  */
  SCU_MCLKSourceConfig(SCU_MCLK_PLL);        /* MCLK = PLL   */

  SCU_APBPeriphClockConfig(__GPIO2 ,ENABLE);
  SCU_APBPeriphClockConfig(__GPIO6 ,ENABLE);
  SCU_APBPeriphClockConfig(__GPIO8 ,ENABLE);
  GPIO_DeInit(GPIO2);
  GPIO_DeInit(GPIO8);
  GPIO_DeInit(GPIO6);
  
  /*LCD Display -----------------------------------------------------------------*/ 
  LCD_Init();
  LCD_Clr();
  LCD_SetCursor(0x02);
  for(i=0;disp_ln1[i]!='\0';i++)
  	LCD_DISP_CHAR(disp_ln1[i]);

  LCD_SetCursor(0x42);
  for(i=0;disp_ln2[i]!='\0';i++)
  	LCD_DISP_CHAR(disp_ln2[i]);


  ENET_InitClocksGPIO();                     /* configure all GPIO */
  ENET_Init(PHY_HALFDUPLEX_10M);             /* Operating mode = Fullduplex 10Mbs */
  ENET_Start();                              /* start Receive & Transmit */
  uIPMain();                                 /* uIP stack main loop */
  while(1);
}