usb_regs.h

STR912的usb例程

/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
* File Name          : usb_regs.h
* Author             : MCD Application Team
* Date First Issued  : 2/6/2006
* Description        : Interface functions to USB cell registers
********************************************************************************
* History:
* 2/6/2006 :  Beta Version V0.1
********************************************************************************
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
* CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS
* A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
* OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
* OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/

#define RegBase  (0x70000800L)  /* USB_IP Peripheral Registers base address */
#define PMAAddr  (0x70000000L)  /* USB_IP Packet Memory Area base address */

/* General registers */
#define CNTR    ((volatile unsigned *)(RegBase + 0x40))	/* Control register */
#define ISTR    ((volatile unsigned *)(RegBase + 0x44))	/* Interrupt status register */
#define FNR     ((volatile unsigned *)(RegBase + 0x48)) /* Frame number register */
#define DADDR   ((volatile unsigned *)(RegBase + 0x4C))	/* Device address register */
#define BTABLE  ((volatile unsigned *)(RegBase + 0x50))	/* Buffer Table address register */
#define DMACR1  ((volatile unsigned *)(RegBase + 0x54)) /* DMA control register 1 */
#define DMACR2  ((volatile unsigned *)(RegBase + 0x58)) /* DMA control register 2 */
#define DMACR3  ((volatile unsigned *)(RegBase + 0x5C)) /* DMA control register 3 */
#define DMABSIZE ((volatile unsigned *)(RegBase + 0x60))/* DMA burst size register */
#define DMALLI  ((volatile unsigned *)(RegBase + 0x64)) /* DMA LLI register */


/* Endpoint registers */
#define EP0REG  ((volatile unsigned *)(RegBase)) /* endpoint 0 register address */
/* endpoints enumeration */
#define ENDP0	 ((BYTE)0)
#define ENDP1	 ((BYTE)1)
#define ENDP2	 ((BYTE)2)
#define ENDP3	 ((BYTE)3)
#define ENDP4	 ((BYTE)4)
#define ENDP5	 ((BYTE)5)
#define ENDP6	 ((BYTE)6)
#define ENDP7	 ((BYTE)7)
#define ENDP8	 ((BYTE)8)
#define ENDP9	 ((BYTE)9)

/******************************************************************************/
/* 							ISTR interrupt events  							                          */
/******************************************************************************/
#define ISTR_CTR   	(0x8000)	/* Correct TRansfer	 (clear-only bit) */
#define ISTR_DOVR  	(0x4000)	/* DMA OVeR/underrun (clear-only bit) */
#define ISTR_ERR   	(0x2000)	/* ERRor					   (clear-only bit) */
#define ISTR_WKUP  	(0x1000)	/* WaKe UP					 (clear-only bit) */
#define ISTR_SUSP  	(0x0800)	/* SUSPend				   (clear-only bit) */
#define ISTR_RESET 	(0x0400)	/* RESET					   (clear-only bit) */
#define ISTR_SOF   	(0x0200)	/* Start Of Frame		 (clear-only bit) */
#define ISTR_ESOF  	(0x0100)	/* Expected Start Of Frame	(clear-only bit) */
#define ISTR_SZDPR  (0x0080)  /* Short or Zero-Length Received Data Packet */
#define ISTR_DIR   	(0x0010)	/* DIRection of transaction	(read-only bit)  */
#define ISTR_EP_ID 	(0x000F)	/* EndPoint IDentifier		  (read-only bit)  */

#define CLR_CTR   	(~ISTR_CTR)	 /* clear Correct TRansfer bit */
#define CLR_DOVR  	(~ISTR_DOVR) /* clear DMA OVeR/underrun	bit*/
#define CLR_ERR   	(~ISTR_ERR)	 /* clear ERRor	bit */
#define CLR_WKUP  	(~ISTR_WKUP) /* clear WaKe UP bit */
#define CLR_SUSP  	(~ISTR_SUSP) /* clear SUSPend bit */
#define CLR_RESET 	(~ISTR_RESET)/* clear RESET	bit */
#define CLR_SOF   	(~ISTR_SOF)	 /* clear Start Of Frame bit */
#define CLR_ESOF  	(~ISTR_ESOF) /* clear Expected Start Of Frame bit */
#define CLR_SZDPR   (~ISTR_SZDPR)/* clear SZDPR bit */

/******************************************************************************/
/*				 CNTR control register bits definitions						                  */
/******************************************************************************/
#define CNTR_CTRM   (0x8000)	/* Correct TRansfer Mask */
#define CNTR_DOVRM  (0x4000)	/* DMA OVeR/underrun Mask */
#define CNTR_ERRM   (0x2000)	/* ERRor Mask */
#define CNTR_WKUPM  (0x1000)	/* WaKe UP Mask */
#define CNTR_SUSPM  (0x0800)	/* SUSPend Mask	*/
#define CNTR_RESETM (0x0400)	/* RESET Mask   */
#define CNTR_SOFM   (0x0200)	/* Start Of Frame Mask */
#define CNTR_ESOFM  (0x0100)	/* Expected Start Of Frame Mask */
#define CNTR_SZDPRM (0x0080)  /* Short or Zero-Length Received Data Packet Mask*/
#define CNTR_RESUME (0x0010)	/* RESUME request */
#define CNTR_FSUSP  (0x0008)	/* Force SUSPend */
#define CNTR_LPMODE (0x0004)	/* Low-power MODE	*/
#define CNTR_PDWN   (0x0002)	/* Power DoWN */
#define CNTR_FRES   (0x0001)	/* Force USB RESet */

/******************************************************************************/
/* 					FNR Frame Number Register bit definitions				                  */
/******************************************************************************/
#define FNR_RXDP	(0x8000)	/* status of D+ data line */
#define FNR_RXDM	(0x4000)	/* status of D- data line */
#define FNR_LCK		(0x2000)	/* LoCKed */
#define FNR_LSOF	(0x1800)	/* Lost SOF */
#define FNR_FN		(0x07FF)	/* Frame Number */
/******************************************************************************/
/*					DADDR Device ADDRess bit definitions					                    */
/******************************************************************************/
#define DADDR_EF	(0x80)
#define DADDR_ADD	(0x7F)

/******************************************************************************/
/*          Endpoint register                                                 */
/******************************************************************************/
/* bit positions */
#define EP_CTR_RX      (0x8000) /* EndPoint Correct TRansfer RX 	*/
#define EP_DTOG_RX     (0x4000) /* EndPoint Data TOGGLE RX */
#define EPRX_STAT      (0x3000)	/* EndPoint RX STATus bit field */
#define EP_SETUP       (0x0800)	/* EndPoint SETUP */
#define EP_T_FIELD     (0x0600) /* EndPoint TYPE */
#define EP_KIND        (0x0100) /* EndPoint KIND */
#define EP_CTR_TX      (0x0080) /* EndPoint Correct TRansfer TX */
#define EP_DTOG_TX     (0x0040) /* EndPoint Data TOGGLE TX */
#define EPTX_STAT      (0x0030)	/* EndPoint TX STATus bit field */
#define EPADDR_FIELD   (0x000F) /* EndPoint ADDRess FIELD */

/* EndPoint REGister MASK (no toggle fields) */
#define EPREG_MASK     (EP_CTR_RX|EP_SETUP|EP_T_FIELD|EP_KIND|EP_CTR_TX|EPADDR_FIELD)

/* EP_TYPE[1:0] EndPoint TYPE */
#define EP_BULK        (0x0000)	/* EndPoint BULK */
#define EP_CONTROL     (0x0200) /* EndPoint CONTROL */
#define EP_ISOCHRONOUS (0x0400) /* EndPoint ISOCHRONOUS */
#define EP_INTERRUPT   (0x0600) /* EndPoint INTERRUPT */
#define EP_T_MASK      (~EP_T_FIELD & EPREG_MASK)


/* EP_KIND EndPoint KIND */
#define EPKIND_MASK    (~EP_KIND & EPREG_MASK)

/* STAT_TX[1:0] STATus for TX transfer */
#define EP_TX_DIS      (0x0000)	/* EndPoint TX DISabled */
#define EP_TX_STALL    (0x0010)	/* EndPoint TX STALLed */
#define EP_TX_NAK      (0x0020) /* EndPoint TX NAKed */
#define EP_TX_VALID    (0x0030)	/* EndPoint TX VALID */
#define EPTX_DTOG1     (0x0010)	/* EndPoint TX Data TOGgle bit1 */
#define EPTX_DTOG2     (0x0020)	/* EndPoint TX Data TOGgle bit2 */
#define EPTX_DTOGMASK  (EPTX_STAT|EPREG_MASK)

/* STAT_RX[1:0] STATus for RX transfer */
#define EP_RX_DIS      (0x0000)	/* EndPoint RX DISabled */
#define EP_RX_STALL    (0x1000)	/* EndPoint RX STALLed */
#define EP_RX_NAK      (0x2000)	/* EndPoint RX NAKed */
#define EP_RX_VALID    (0x3000)	/* EndPoint RX VALID */
#define EPRX_DTOG1     (0x1000)	/* EndPoint RX Data TOGgle bit1 */
#define EPRX_DTOG2     (0x2000)	/* EndPoint RX Data TOGgle bit1 */
#define EPRX_DTOGMASK  (EPRX_STAT|EPREG_MASK)


typedef enum _EP_DBUF_DIR{		/* double buffered endpoint direction */
 EP_DBUF_ERR,
 EP_DBUF_OUT,
 EP_DBUF_IN
}EP_DBUF_DIR;

enum EP_BUF_NUM{	/* endpoint buffer number */
 EP_NOBUF,
 EP_BUF0 ,
 EP_BUF1
};


extern volatile WORD wIstr;  /* ISTR register last read value */

/******************************************************************************/
/*				             FUNCTION PROTOTYPES							                      */
/*							                &									                            */
/*						              M A C R O s 							                        */
/******************************************************************************/

/* SetCNTR */
void SetCNTR(WORD /*wRegValue*/);
#define _SetCNTR(wRegValue)	 (*CNTR   = (WORD)wRegValue)
/*----------------------------------------------------------------------------*/
/* SetISTR */
void SetISTR(WORD /*wRegValue*/);
#define _SetISTR(wRegValue)	 (*ISTR   = (WORD)wRegValue)
/*----------------------------------------------------------------------------*/
/* SetDADDR */
void SetDADDR(WORD /*wRegValue*/);
#define _SetDADDR(wRegValue) (*DADDR  = (WORD)wRegValue)
/*----------------------------------------------------------------------------*/
/* SetBTABLE */
void SetBTABLE(WORD /*wRegValue*/);
#define _SetBTABLE(wRegValue)(*BTABLE = (WORD)(wRegValue & 0xFFF8))
/*----------------------------------------------------------------------------*/
/* GetCNTR */
WORD GetCNTR(void);
#define _GetCNTR()   ((WORD) *CNTR)
/*----------------------------------------------------------------------------*/
/* GetISTR */
WORD GetISTR(void);
#define _GetISTR()   ((WORD) *ISTR)
/*----------------------------------------------------------------------------*/
/* GetFNR */
WORD GetFNR(void);
#define _GetFNR()    ((WORD) *FNR)
/*----------------------------------------------------------------------------*/
/* GetDADDR */
WORD GetDADDR(void);
#define	_GetDADDR()  ((WORD) *DADDR)
/*----------------------------------------------------------------------------*/
/* GetBTABLE */
WORD GetBTABLE(void);
#define _GetBTABLE() ((WORD) *BTABLE)
/*----------------------------------------------------------------------------*/
/* Pointers on endpoint(bEpNum) Count & Addr registers on PMA */
#define _pEPBufCount(bEpNum)	((DWORD *)(_GetBTABLE()+bEpNum*8 + 4   + PMAAddr))
#define _pEPBufAddr(bEpNum)	((DWORD *)(_GetBTABLE()+bEpNum*8         + PMAAddr))
/*----------------------------------------------------------------------------*/
/* SetENDPOINT */
void SetENDPOINT(BYTE /*bEpNum*/,WORD /*wRegValue*/);
#define _SetENDPOINT(bEpNum,wRegValue)  (*(EP0REG + bEpNum)= \
/*----------------------------------------------------------------------------*/												 (WORD)wRegValue)
/* GetENDPOINT */
WORD GetENDPOINT(BYTE /*bEpNum*/);
#define _GetENDPOINT(bEpNum)  		    ((WORD)(*(EP0REG + bEpNum)))
/*----------------------------------------------------------------------------*/