📄 mp_init.c
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Status = NDIS_STATUS_DEVICE_FAILED;
}
DBGPRINT_S(Status, ("<-- NICSelfTest, Status=%x\n", Status));
return Status;
}
NDIS_STATUS NICInitializeAdapter(
IN PMP_ADAPTER Adapter)
/*++
Routine Description:
Initialize the adapter and set up everything
Arguments:
Adapter Pointer to our adapter
Return Value:
NDIS_STATUS_SUCCESS
NDIS_STATUS_HARD_ERRORS
--*/
{
NDIS_STATUS Status;
DBGPRINT(MP_TRACE, ("--> NICInitializeAdapter\n"));
do
{
// set up our link indication variable
// it doesn't matter what this is right now because it will be
// set correctly if link fails
Adapter->MediaState = NdisMediaStateConnected;
Adapter->CurrentPowerState = NdisDeviceStateD0;
Adapter->NextPowerState = NdisDeviceStateD0;
// Issue a software reset to the D100
HwSoftwareReset(Adapter);
// Load the CU BASE (set to 0, because we use linear mode)
Adapter->CSRAddress->ScbGeneralPointer = 0;
Status = D100IssueScbCommand(Adapter, SCB_CUC_LOAD_BASE, FALSE);
if (Status != NDIS_STATUS_SUCCESS)
{
break;
}
// Wait for the SCB command word to clear before we set the general pointer
if (!WaitScb(Adapter))
{
Status = NDIS_STATUS_HARD_ERRORS;
break;
}
// Load the RU BASE (set to 0, because we use linear mode)
Adapter->CSRAddress->ScbGeneralPointer = 0;
Status = D100IssueScbCommand(Adapter, SCB_RUC_LOAD_BASE, FALSE);
if (Status != NDIS_STATUS_SUCCESS)
{
break;
}
// Configure the adapter
Status = HwConfigure(Adapter);
if (Status != NDIS_STATUS_SUCCESS)
{
break;
}
Status = HwSetupIAAddress(Adapter);
if (Status != NDIS_STATUS_SUCCESS)
{
break;
}
// Clear the internal counters
HwClearAllCounters(Adapter);
} while (FALSE);
if (Status != NDIS_STATUS_SUCCESS)
{
NdisWriteErrorLogEntry(
Adapter->AdapterHandle,
NDIS_ERROR_CODE_HARDWARE_FAILURE,
1,
ERRLOG_INITIALIZE_ADAPTER);
}
DBGPRINT_S(Status, ("<-- NICInitializeAdapter, Status=%x\n", Status));
return Status;
}
VOID HwSoftwareReset(
IN PMP_ADAPTER Adapter)
/*++
Routine Description:
Issue a software reset to the hardware
Arguments:
Adapter Pointer to our adapter
Return Value:
None
--*/
{
DBGPRINT(MP_TRACE, ("--> HwSoftwareReset\n"));
// Issue a PORT command with a data word of 0
Adapter->CSRAddress->Port = PORT_SOFTWARE_RESET;
// wait after the port reset command
NdisStallExecution(NIC_DELAY_POST_RESET);
// Mask off our interrupt line -- its unmasked after reset
NICDisableInterrupt(Adapter);
DBGPRINT(MP_TRACE, ("<-- HwSoftwareReset\n"));
}
NDIS_STATUS HwConfigure(
IN PMP_ADAPTER Adapter)
/*++
Routine Description:
Configure the hardware
Arguments:
Adapter Pointer to our adapter
Return Value:
NDIS_STATUS_SUCCESS
NDIS_STATUS_HARD_ERRORS
--*/
{
NDIS_STATUS Status;
PCB_HEADER_STRUC NonTxCmdBlockHdr = (PCB_HEADER_STRUC)Adapter->NonTxCmdBlock;
UINT i;
DBGPRINT(MP_TRACE, ("--> HwConfigure\n"));
//
// Init the packet filter to nothing.
//
Adapter->OldPacketFilter = Adapter->PacketFilter;
Adapter->PacketFilter = 0;
//
// Store the current setting for BROADCAST/PROMISCUOS modes
Adapter->OldParameterField = CB_557_CFIG_DEFAULT_PARM15;
// Setup the non-transmit command block header for the configure command.
NonTxCmdBlockHdr->CbStatus = 0;
NonTxCmdBlockHdr->CbCommand = CB_CONFIGURE;
NonTxCmdBlockHdr->CbLinkPointer = DRIVER_NULL;
// Fill in the configure command data.
// First fill in the static (end user can't change) config bytes
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[0] = CB_557_CFIG_DEFAULT_PARM0;
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[2] = CB_557_CFIG_DEFAULT_PARM2;
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[3] = CB_557_CFIG_DEFAULT_PARM3;
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[6] = CB_557_CFIG_DEFAULT_PARM6;
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[9] = CB_557_CFIG_DEFAULT_PARM9;
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[10] = CB_557_CFIG_DEFAULT_PARM10;
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[11] = CB_557_CFIG_DEFAULT_PARM11;
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[12] = CB_557_CFIG_DEFAULT_PARM12;
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[13] = CB_557_CFIG_DEFAULT_PARM13;
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[14] = CB_557_CFIG_DEFAULT_PARM14;
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[16] = CB_557_CFIG_DEFAULT_PARM16;
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[17] = CB_557_CFIG_DEFAULT_PARM17;
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[18] = CB_557_CFIG_DEFAULT_PARM18;
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[20] = CB_557_CFIG_DEFAULT_PARM20;
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[21] = CB_557_CFIG_DEFAULT_PARM21;
// Now fill in the rest of the configuration bytes (the bytes that contain
// user configurable parameters).
// Set the Tx and Rx Fifo limits
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[1] =
(UCHAR) ((Adapter->AiTxFifo << 4) | Adapter->AiRxFifo);
if (Adapter->MWIEnable)
{
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[3] |= CB_CFIG_B3_MWI_ENABLE;
}
// Set the Tx and Rx DMA maximum byte count fields.
if ((Adapter->AiRxDmaCount) || (Adapter->AiTxDmaCount))
{
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[4] =
Adapter->AiRxDmaCount;
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[5] =
(UCHAR) (Adapter->AiTxDmaCount | CB_CFIG_DMBC_EN);
}
else
{
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[4] =
CB_557_CFIG_DEFAULT_PARM4;
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[5] =
CB_557_CFIG_DEFAULT_PARM5;
}
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[7] =
(UCHAR) ((CB_557_CFIG_DEFAULT_PARM7 & (~CB_CFIG_URUN_RETRY)) |
(Adapter->AiUnderrunRetry << 1)
);
// Setup for MII or 503 operation. The CRS+CDT bit should only be set
// when operating in 503 mode.
if (Adapter->PhyAddress == 32)
{
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[8] =
(CB_557_CFIG_DEFAULT_PARM8 & (~CB_CFIG_503_MII));
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[15] =
(CB_557_CFIG_DEFAULT_PARM15 | CB_CFIG_CRS_OR_CDT);
}
else
{
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[8] =
(CB_557_CFIG_DEFAULT_PARM8 | CB_CFIG_503_MII);
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[15] =
((CB_557_CFIG_DEFAULT_PARM15 & (~CB_CFIG_CRS_OR_CDT)) | CB_CFIG_BROADCAST_DIS);
}
// Setup Full duplex stuff
// If forced to half duplex
if (Adapter->AiForceDpx == 1)
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[19] =
(CB_557_CFIG_DEFAULT_PARM19 &
(~(CB_CFIG_FORCE_FDX| CB_CFIG_FDX_ENABLE)));
// If forced to full duplex
else if (Adapter->AiForceDpx == 2)
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[19] =
(CB_557_CFIG_DEFAULT_PARM19 | CB_CFIG_FORCE_FDX);
// If auto-duplex
else
{
// We must force full duplex on if we are using PHY 0, and we are
// supposed to run in FDX mode. We do this because the D100 has only
// one FDX# input pin, and that pin will be connected to PHY 1.
if ((Adapter->PhyAddress == 0) && (Adapter->usDuplexMode == 2))
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[19] =
(CB_557_CFIG_DEFAULT_PARM19 | CB_CFIG_FORCE_FDX);
else
Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[19] =
CB_557_CFIG_DEFAULT_PARM19;
}
// display the config info to the debugger
DBGPRINT(MP_INFO, (" Issuing Configure command\n"));
DBGPRINT(MP_INFO, (" Config Block at virt addr "PTR_FORMAT", phys address %x\n",
&NonTxCmdBlockHdr->CbStatus, Adapter->NonTxCmdBlockPhys));
for (i=0; i < CB_CFIG_BYTE_COUNT; i++)
DBGPRINT(MP_INFO, (" Config byte %x = %.2x\n",
i, Adapter->NonTxCmdBlock->NonTxCb.Config.ConfigBytes[i]));
// Wait for the SCB command word to clear before we set the general pointer
if (!WaitScb(Adapter))
{
Status = NDIS_STATUS_HARD_ERRORS;
}
else
{
ASSERT(Adapter->CSRAddress->ScbCommandLow == 0)
Adapter->CSRAddress->ScbGeneralPointer = Adapter->NonTxCmdBlockPhys;
// Submit the configure command to the chip, and wait for it to complete.
Status = D100SubmitCommandBlockAndWait(Adapter);
}
DBGPRINT_S(Status, ("<-- HwConfigure, Status=%x\n", Status));
return Status;
}
NDIS_STATUS HwSetupIAAddress(
IN PMP_ADAPTER Adapter)
/*++
Routine Description:
Set up the individual MAC address
Arguments:
Adapter Pointer to our adapter
Return Value:
NDIS_STATUS_SUCCESS
NDIS_SUCCESS_HARD_ERRORS
--*/
{
NDIS_STATUS Status;
UINT i;
PCB_HEADER_STRUC NonTxCmdBlockHdr = (PCB_HEADER_STRUC)Adapter->NonTxCmdBlock;
DBGPRINT(MP_TRACE, ("--> HwSetupIAAddress\n"));
// Individual Address Setup
NonTxCmdBlockHdr->CbStatus = 0;
NonTxCmdBlockHdr->CbCommand = CB_IA_ADDRESS;
NonTxCmdBlockHdr->CbLinkPointer = DRIVER_NULL;
// Copy in the station's individual address
for (i = 0; i < ETH_LENGTH_OF_ADDRESS; i++)
Adapter->NonTxCmdBlock->NonTxCb.Setup.IaAddress[i] = Adapter->CurrentAddress[i];
// Update the command list pointer. We don't need to do a WaitSCB here
// because this command is either issued immediately after a reset, or
// after another command that runs in polled mode. This guarantees that
// the low byte of the SCB command word will be clear. The only commands
// that don't run in polled mode are transmit and RU-start commands.
ASSERT(Adapter->CSRAddress->ScbCommandLow == 0)
Adapter->CSRAddress->ScbGeneralPointer = Adapter->NonTxCmdBlockPhys;
// Submit the IA configure command to the chip, and wait for it to complete.
Status = D100SubmitCommandBlockAndWait(Adapter);
DBGPRINT_S(Status, ("<-- HwSetupIAAddress, Status=%x\n", Status));
return Status;
}
NDIS_STATUS HwClearAllCounters(
IN PMP_ADAPTER Adapter)
/*++
Routine Description:
This routine will clear the hardware error statistic counters
Arguments:
Adapter Pointer to our adapter
Return Value:
NDIS_STATUS_SUCCESS
NDIS_STATUS_HARD_ERRORS
--*/
{
NDIS_STATUS Status;
BOOLEAN bResult;
DBGPRINT(MP_TRACE, ("--> HwClearAllCounters\n"));
do
{
// Load the dump counters pointer. Since this command is generated only
// after the IA setup has complete, we don't need to wait for the SCB
// command word to clear
ASSERT(Adapter->CSRAddress->ScbCommandLow == 0)
Adapter->CSRAddress->ScbGeneralPointer = Adapter->StatsCounterPhys;
// Issue the load dump counters address command
Status = D100IssueScbCommand(Adapter, SCB_CUC_DUMP_ADDR, FALSE);
if (Status != NDIS_STATUS_SUCCESS)
break;
// Now dump and reset all of the statistics
Status = D100IssueScbCommand(Adapter, SCB_CUC_DUMP_RST_STAT, TRUE);
if (Status != NDIS_STATUS_SUCCESS)
break;
// Now wait for the dump/reset to complete, timeout value 2 secs
MP_STALL_AND_WAIT(Adapter->StatsCounters->CommandComplete == 0xA007, 2000, bResult);
if (!bResult)
{
MP_SET_HARDWARE_ERROR(Adapter);
Status = NDIS_STATUS_HARD_ERRORS;
break;
}
// init packet counts
Adapter->GoodTransmits = 0;
Adapter->GoodReceives = 0;
// init transmit error counts
Adapter->TxAbortExcessCollisions = 0;
Adapter->TxLateCollisions = 0;
Adapter->TxDmaUnderrun = 0;
Adapter->TxLostCRS = 0;
Adapter->TxOKButDeferred = 0;
Adapter->OneRetry = 0;
Adapter->MoreThanOneRetry = 0;
Adapter->TotalRetries = 0;
// init receive error counts
Adapter->R
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