📄 define.h
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#ifndef __define_h__
#define __define_h__
#include<inavr.h>
//#include<pgmspace.h>
#include "delay.h"
#define WDR() __watchdog_reset()
#define nop() __no_operation()
#define NOP nop(); nop(); nop();
#define SetBit(PINREG,PLACE) (PINREG |=(1<<PLACE))
#define ClrBit(PINREG,PLACE) (PINREG &=~(1<<PLACE))
#define ValBit(PINREG,PLACE) (PINREG &(1<<PLACE)?1:0)
//#define FREQUENCY 8000000/*8M*/
#define uDelay(c) (__delay_cycles(8*c))
/* UART Control and Status Register A */
#define RXC 7
#define TXC 6
#define UDRE 5
#define FE 4
#define DOR 3
#define PE 2
#define U2X 1
#define MPCM 0
/* UART Control and Status Register B */
#define RXCIE 7
#define TXCIE 6
#define UDRIE 5
#define RXEN 4
#define TXEN 3
#define UCSZ2 2
#define RXB8 1
#define TXB8 0
/* 基准源 */
#define ADC_REFS_AREF 0x00 //AREF
#define ADC_REFS_AVCC 0x40 //AVCC
#define ADC_REFS_VREF 0xC0 //VREF
#define ADC_REFS ADC_REFS_AREF
/* 结果左对齐 */
#define ADC_ADLAR_LEFT 0x20
#define ADC_ADLAR_RIGHT 0x00
#define ADC_ADLAR ADC_ADLAR_LEFT
/* 通道 */
#define ADC_MUX_AD0 0x00
#define ADC_MUX_AD1 0x01
#define ADC_MUX_AD2 0x02
#define ADC_MUX_AD3 0x03
#define ADC_MUX_AD4 0x04
#define ADC_MUX_AD5 0x05
#define ADC_MUX_AD6 0x06
#define ADC_MUX_AD7 0x07
#define ADC_MUX ADC_MUX_AD0
/* 分频因子 */
#define ADC_ADPS1 0x00
#define ADC_ADPS2 0x01
#define ADC_ADPS4 0x02
#define ADC_ADPS8 0x03
#define ADC_ADPS16 0x04
#define ADC_ADPS32 0x05
#define ADC_ADPS64 0x06
#define ADC_ADPS128 0x07
#define ADC_ADPS ADC_ADPS128
#define ADEN 7
#define ADSC 6
#define ADATE 5
#define ADIF 4
#define ADIE 3
/* 晶振 */
#define ZTA80000
/* cpu的选择 */
#include <iom16.h>
#define uchar unsigned char
#define uint unsigned int
#define TRUE 1
#define FALSE 0
#define CMDNUM 10//send to macha mcu
#define ACK 0xF0
#define NACK 0xFF
#define HIG 1
#define LOW 0
#define STATUSROW 11
#define STATUSCOL 2
/* 定义 PROTD */
#define IEBusPORT PORTD
#define IEBusPIN PIND
#define IEBusDDR DDRD
#define IEBusCLK 7
#define IEBusDAT 6
#define IEBusCMD 4
#define IEBusCLK_High SetBit(IEBusPORT,IEBusCLK)
#define IEBusCLK_Low ClrBit(IEBusPORT,IEBusCLK)
#define IEBusDAT_High SetBit(IEBusPORT,IEBusDAT)
#define IEBusDAT_Low ClrBit(IEBusPORT,IEBusDAT)
#define IEBusDATOut SetBit(IEBusDDR ,IEBusDAT)
#define IEBusDATIn ClrBit(IEBusDDR ,IEBusDAT)
#define IEBusDAT_Val (ValBit(IEBusPIN,IEBusDAT)?1:0)
#define IEBusCMD_High SetBit(IEBusPORT,IEBusCMD)
#define IEBusCMD_Low ClrBit(IEBusPORT,IEBusCMD)
/*PORTC*/
#define I2CPORT PORTC
#define I2CPIN PINC
#define I2CDDR DDRC
#define I2CCLK 0
#define I2CDAT 1
#define LED1 2
#define LED2 3
#define HIGHV_PC 4
#define VGHGL_PC 5
#define DECODE_PC 6
#define MODE 7
#define I2CCLK_High SetBit(I2CPORT,I2CCLK)
#define I2CCLK_Low ClrBit(I2CPORT,I2CCLK)
#define I2CDAT_High SetBit(I2CPORT,I2CDAT)
#define I2CDAT_Low ClrBit(I2CPORT,I2CDAT)
#define I2CDAT_Out SetBit(I2CDDR,I2CDAT)
#define I2CDAT_In ClrBit(I2CDDR,I2CDAT)
#define I2CDAT_Val (ValBit(I2CPIN,I2CDAT)?1:0)
#define LED1_High SetBit(I2CPORT,LED1)
#define LED1_Low ClrBit(I2CPORT,LED1)
#define LED2_High SetBit(I2CPORT,LED2)
#define LED2_Low ClrBit(I2CPORT,LED2)
#define HIGHV_High SetBit(I2CPORT,HIGHV_PC)
#define HIGHV_Low ClrBit(I2CPORT,HIGHV_PC)
#define VGHGL_High SetBit(I2CPORT,VGHGL_PC)
#define VGHGL_Low ClrBit(I2CPORT,VGHGL_PC)
#define DECODE_High SetBit(I2CPORT,DECODE_PC)
#define DECODE_Low ClrBit(I2CPORT,DECODE_PC)
#define MODE_High SetBit(I2CPORT,MODE)
#define MODE_Low ClrBit(I2CPORT,MODE)
/* PORTB */
#define TIMEPORT PORTB
#define TIMEPIN PINB
#define TIMEDDR DDRB
#define LR 0
#define UD 1
#define ACCDET 2
#define NPC 4
#define TDAT 5
#define TRST 6
#define TCLK 7
#define LR_High SetBit(TIMEPORT,LR)
#define LR_Low ClrBit(TIMEPORT,LR)
#define UD_High SetBit(TIMEPORT,UD)
#define UD_Low ClrBit(TIMEPORT,UD)
#define ACCDET_High SetBit(TIMEPORT,ACCDET)
#define ACCDET_Low ClrBit(TIMEPORT,ACCDET)
#define ACCDET_Out SetBit(TIMEDDR ,ACCDET)
#define ACCDET_In ClrBit(TIMEDDR ,ACCDET)
#define ACCDET_Val (ValBit(TIMEPIN,ACCDET)?1:0)
#define NPC_High SetBit(TIMEPORT,NPC)
#define NPC_Low ClrBit(TIMEPORT,NPC)
#define NPC_Out SetBit(TIMEDDR ,NPC)
#define NPC_In ClrBit(TIMEDDR ,NPC)
#define NPC_Val (ValBit(TIMEPIN,NPC)?1:0)
#define TDAT_High SetBit(TIMEPORT,TDAT)
#define TDAT_Low ClrBit(TIMEPORT,TDAT)
#define TDAT_Out SetBit(TIMEDDR ,TDAT)
#define TDAT_In ClrBit(TIMEDDR ,TDAT)
#define TDAT_Val (ValBit(TIMEPIN,TDAT)?1:0)
#define TCLK_High SetBit(TIMEPORT,TCLK)
#define TCLK_Low ClrBit(TIMEPORT,TCLK)
#define TRST_High SetBit(TIMEPORT,TRST)
#define TRST_Low ClrBit(TIMEPORT,TRST)
/*PORTA*/
#define SWPORT PORTA
#define SWPIN PINA
#define SWDDR DDRA
#define OSDSW 7//sw2
#define RGBSW 6//sw1
#define RGBSw_High SetBit(SWPORT,RGBSW)//#define RGBSw_High SetBit(IEBusPORT,RGBSW)
#define RGBSw_Low ClrBit(SWPORT,RGBSW)//#define RGBSw_Low ClrBit(IEBusPORT,RGBSW)
#define OSDSw_High SetBit(SWPORT,OSDSW)//#define OSDSw_High SetBit(IEBusPORT,OSDSW)
#define OSDSw_Low ClrBit(SWPORT,OSDSW)//#define OSDSw_Low ClrBit(IEBusPORT,OSDSW)
/********************************************************/
/* EEPROM */
#define EERIE 3
#define EEMWE 2
#define EEWE 1
#define EERE 0
#define __EEPUT(ADR,VAL) (*((unsigned char __eeprom *)ADR) = VAL)
#define __EEGET(VAR, ADR) (VAR = *((unsigned char __eeprom *)ADR))
/*EEPROM ADDRESS */
#define SOUNDADDR 0x01
#define SOUNDBASSADDR 0x02
#define SOUNDTREBADDR 0x03
#define SOUNDFLATADDR 0x04
#define SOUNDBALANCEADDR 0x05
#define RADIOBAND 0x10
#define RADIOFREQ 0x11
#define RADIOFREOFF 0x12
#define RADIOFRECH 0x13
#define FREQCHTABADDR 0x14
#define FREQTAB1ADDR 0x20
#define FREQOFFTAB1ADDR 0x28
#define FREQTAB2ADDR 0x30
#define FREQOFFTAB2ADDR 0x38
#define FREQTAB3ADDR 0x40
#define FREQOFFTAB3ADDR 0x48
#define VIDEOADDR 0x50
#define SYSTEMADDR 0x60
#define SYSMENUADDR 0x81
#define MEMORYINITFLGADDR 0xFE
/*******************************************/
/* 9 + 4.5 ms 108 0x61 */
#define Time4_5_Big 0x70
#define Time4_5_Small 0x60
/* 0.6 + 2.2 ms 22.4 */
#define Time2_2_Big 0x5F
#define Time2_2_Small 0x40
/* 0.6 + 1.7 ms 18.4 0x10 */
#define Time1_7_Big 0x15
#define Time1_7_Small 0x0E
/* 0.6 + 0.6 ms 9.6 0x08 */
#define Time0_6_Big 0x0D
#define Time0_6_Small 0x07//0x03
#define Time1_4_5_Big 0x3A80
#define Time1_4_5_Small 0x3100//0x3300
/* 0.6 + 2.2 ms 22.4 0x0AF0*/
#define Time1_2_2_Big 0x3000//3000
#define Time1_2_2_Small 0x1700//1800
/* 0.6 + 1.7 ms 18.4 0x08F0 */
#define Time1_1_7_Big 0x0AA0//0x0AA0
#define Time1_1_7_Small 0x0600//0x0600//0700
/* 0.6 + 0.6 ms 9.6 0x4B0 */
#define Time1_0_6_Big 0x05A0//0x05A0
#define Time1_0_6_Small 0x0200//0x0200
/* time0/1 clk select */
#define CLK_STOP 0x00// stop
#define CLK_1 0x01// clk
#define CLK_8 0x02// clk/8
#define CLK_64 0x03// clk/64
#define CLK_256 0x04// clk/256
#define CLK_1024 0x05// clk/1024
#define CLK_FALL 0x06// T0/T1 falling
#define CLK_RISING 0x07// T0T1 rising
/* time2 clk select */
#define CLK2_STOP 0x00// stop
#define CLK2_1 0x01// clk
#define CLK2_8 0x02// clk/8
#define CLK2_32 0x03// clk/32
#define CLK2_64 0x04// clk/64
#define CLK2_128 0x05// clk/128
#define CLK2_256 0x06// clk/256
#define CLK2_1024 0x07// clk/1024
#define CLK1 CLK_8
/* interrupt setting */
#define EA_Enable SetBit(SREG,7)
#define EA_Disable ClrBit(SREG,7)
#define INT0_Enable SetBit(GICR,6)//GIMSK 4433 m16 GICR
#define INT0_Disable ClrBit(GICR,6)
#define INT1_Enable SetBit(GICR,7)
#define INT1_Disable ClrBit(GICR,7)
#define INT2_Enable SetBit(GICR,5)
#define INT2_Disable ClrBit(GICR,5)
#define TOIE0_Enable SetBit(TIMSK,0)// time0 over interrupt
#define TOIE1_Enable SetBit(TIMSK,2)// time1 over interrupt
#define TOIE2_Enable SetBit(TIMSK,6)// time2 over interrupt
#define OCIE1_Enable SetBit(TIMSK,4)// time1 compare interrupt
#define TICIE1_Enable SetBit(TIMSK,5)// time1 capture interrupt
#define TOIE0_Disable ClrBit(TIMSK,0)// time0 over interrupt
#define TOIE1_Disable ClrBit(TIMSK,2)// time1 over interrupt
#define TOIE2_Enable SetBit(TIMSK,6)// time2 over interrupt
#define OCIE1_Disable ClrBit(TIMSK,4)// time1 compare interrupt
#define TICIE1_Disable ClrBit(TIMSK,5)// time1 capture interrupt
#define ADC_Enable SetBit(ADCSRA,ADEN)
#define ADC_Disable ClrBit(ADCSRA,ADEN)
#define ADC_Start SetBit(ADCSRA,ADSC)
#define ADC_Stop ClrBit(ADCSRA,ADSC)
#define ADIE_Enable SetBit(ADCSRA,ADIE)
#define ADIE_Disable ClrBit(ADCSRA,ADIE)
#endif
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