📄 wireless_cc1100rx.c
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halSpiWriteReg(CCxxx0_DEVIATN, RegValue[i++]);//pRfSettings->DEVIATN);
halSpiWriteReg(CCxxx0_FREND1, RegValue[i++]);//pRfSettings->FREND1);
halSpiWriteReg(CCxxx0_FREND0, RegValue[i++]);//pRfSettings->FREND0);
halSpiWriteReg(CCxxx0_MCSM0 , RegValue[i++]);//pRfSettings->MCSM0 );
halSpiWriteReg(CCxxx0_FOCCFG, RegValue[i++]);//pRfSettings->FOCCFG);
halSpiWriteReg(CCxxx0_BSCFG, RegValue[i++]);//pRfSettings->BSCFG);
halSpiWriteReg(CCxxx0_AGCCTRL2, RegValue[i++]);//pRfSettings->AGCCTRL2);
halSpiWriteReg(CCxxx0_AGCCTRL1, RegValue[i++]);//pRfSettings->AGCCTRL1);
halSpiWriteReg(CCxxx0_AGCCTRL0, RegValue[i++]);//pRfSettings->AGCCTRL0);
halSpiWriteReg(CCxxx0_FSCAL3, RegValue[i++]);//pRfSettings->FSCAL3);
halSpiWriteReg(CCxxx0_FSCAL2, RegValue[i++]);//pRfSettings->FSCAL2);
halSpiWriteReg(CCxxx0_FSCAL1, RegValue[i++]);//pRfSettings->FSCAL1);
halSpiWriteReg(CCxxx0_FSCAL0, RegValue[i++]);//pRfSettings->FSCAL0);
halSpiWriteReg(CCxxx0_FSTEST, RegValue[i++]);//pRfSettings->FSTEST);
halSpiWriteReg(CCxxx0_TEST2, RegValue[i++]);//pRfSettings->TEST2);
halSpiWriteReg(CCxxx0_TEST1, RegValue[i++]);//pRfSettings->TEST1);
halSpiWriteReg(CCxxx0_TEST0, RegValue[i++]);//pRfSettings->TEST0);
halSpiWriteReg(CCxxx0_IOCFG2, RegValue[i++]);//pRfSettings->IOCFG2);
halSpiWriteReg(CCxxx0_IOCFG0, RegValue[i++]);//pRfSettings->IOCFG0);
halSpiWriteReg(CCxxx0_PKTCTRL1, RegValue[i++]);//pRfSettings->PKTCTRL1);
halSpiWriteReg(CCxxx0_PKTCTRL0, RegValue[i++]);//pRfSettings->PKTCTRL0);
halSpiWriteReg(CCxxx0_ADDR, RegValue[i++]);//pRfSettings->ADDR);
halSpiWriteReg(CCxxx0_PKTLEN, RegValue[i]); //pRfSettings->PKTLEN);
}
//-------------------------------------------------------------------------------------------------------
// BYTE halSpiReadReg(BYTE addr)
//
// DESCRIPTION:
// This function gets the value of a single specified CCxxx0 register.
//
// ARGUMENTS:
// BYTE addr
// Address of the CCxxx0 register to be accessed.
//
// RETURN VALUE:
// BYTE
// Value of the accessed CCxxx0 register.
//-------------------------------------------------------------------------------------------------------
unsigned char halSpiReadReg(unsigned char addr)
{
unsigned char x;
// SPI0CN = 0x08; // clear all flags
NSSMD0 = 0;
while (SO_data);
// {SO_data = 0;}
SPI0DAT = (addr | READ_SINGLE);
SPI_WAIT();
SPI0DAT = 0;
SPI_WAIT();
x = SPI0DAT;
NSSMD0 = 1;
SO_data = 0;
return x;
}// halSpiReadReg
//-------------------------------------------------------------------------------------------------------
// void halSpiWriteReg(BYTE addr, BYTE value)
//
// DESCRIPTION:
// Function for writing to a single CCxxx0 register
//
// ARGUMENTS:
// BYTE addr
// Address of a specific CCxxx0 register to accessed.
// BYTE value
// Value to be written to the specified CCxxx0 register.
//-------------------------------------------------------------------------------------------------------
void halSpiWriteReg(unsigned char addr,unsigned char value) {
// SPI0CN = 0x08; // clear all flags
NSSMD0 = 0;
while (SO_data);
// {SO_data = 0;}
SPI0DAT = addr;
SPI_WAIT();
SPI0DAT = value;
SPI_WAIT();
NSSMD0 = 1;
SO_data = 0;
}// halSpiWriteReg
//-----------------------------------------------------------------------------
// FIFO Routines
//-----------------------------------------------------------------------------
// All FIFO functions pass a pointer to the fifo. Pull functions return
// either a short or a char, and push functions have the data to be pushed
// as an additional parameter.
// Pushes and pulls update EMPTY, COUNT, and OF variables.
//
unsigned char ReceiveFIFO_Pull(void)
{
unsigned char output;
if(ReceiveFIFO_EMPTY)
{
// if buffer is empty, set underflow flag and exit
ReceiveFIFO_UF = 1;
return 0;
}
else
{
ReceiveFIFO_FULL = 0; // buffer is no longer full
// wrap FIFO pointer if necessary
if (ReceiveFIFO_FIRST==ReceiveFIFO_FIFOSIZE-1) ReceiveFIFO_FIRST = 0;
else (ReceiveFIFO_FIRST)++;
// pull value from fifo
output = ReceiveFIFO_FIFO[ReceiveFIFO_FIRST];
// set empty indicator if necessary
if (--(ReceiveFIFO_COUNT) == 0) ReceiveFIFO_EMPTY = 1;
return output;
}
}
void ReceiveFIFO_Push(unsigned char num)
{
ReceiveFIFO_EMPTY = 0; // FIFO is no longer empty
if (!ReceiveFIFO_FULL) {
(ReceiveFIFO_LAST)++; // increment, wrap if necessary
if (ReceiveFIFO_LAST == ReceiveFIFO_FIFOSIZE)
{
ReceiveFIFO_LAST = 0;
}
ReceiveFIFO_FIFO[ReceiveFIFO_LAST]=num; // push value to FIFO
ReceiveFIFO_COUNT++;
if ( ReceiveFIFO_COUNT == ReceiveFIFO_FIFOSIZE)
{
ReceiveFIFO_FULL = 1;
}
// buffer is full
} else {
// only set overflow flag and exit
ReceiveFIFO_OF = 1;
}
}
void DACTXFIFO_Push(unsigned short num)
{
DACTXFIFO_EMPTY = 0; // buffer is no longer empty
if (!DACTXFIFO_FULL) {
(DACTXFIFO_LAST)++; // increment, wrap around if necessary
if (DACTXFIFO_LAST == DACTXFIFO_FIFOSIZE)
{
DACTXFIFO_LAST = 0;
}
DACTXFIFO_FIFO[DACTXFIFO_LAST]=num;
// update count, check for an overflow
++DACTXFIFO_COUNT;
if (DACTXFIFO_COUNT == DACTXFIFO_FIFOSIZE - 1)
{
// the decompression routine will push two decompressed
// audio samples per call to the routine, and
// DACTXFIFO_DECOMPRESS_HALT is set when the buffer can only
// store 1 more decompressed sample.
// The flag will be cleared when at least one buffer byte is pulled
DACTXFIFO_DECOMPRESS_HALT = 1;
}
else if (DACTXFIFO_COUNT == DACTXFIFO_FIFOSIZE)
{
DACTXFIFO_DECOMPRESS_HALT = 1;
DACTXFIFO_FULL = 1;
}
else if ( DACTXFIFO_COUNT == DACTXFIFO_FIFOSIZE+1)
{
DACTXFIFO_DECOMPRESS_HALT = 1;
DACTXFIFO_FULL = 1;
DACTXFIFO_OF = 1;
}
} else {
DACTXFIFO_OF = 1;
}
}
unsigned short DACTXFIFO_Pull(void)
{
unsigned short output;
// if a function tries to pull a value from an empty buffer, set the
// underflow flag and exit the function
if(DACTXFIFO_EMPTY)
{
DACTXFIFO_UF = 1;
return 0;
}
// else the buffer is not empty, pull the value and return it
else
{
DACTXFIFO_FULL = 0;
// update the first pointer, wrap around if necessary
if (DACTXFIFO_FIRST==DACTXFIFO_FIFOSIZE-1) DACTXFIFO_FIRST = 0;
else (DACTXFIFO_FIRST)++;
// save output value
output = DACTXFIFO_FIFO[DACTXFIFO_FIRST];
// decrement buffer size
if (--(DACTXFIFO_COUNT) == 0) DACTXFIFO_EMPTY = 1;
if((DACTXFIFO_DECOMPRESS_HALT) &&
(DACTXFIFO_COUNT <= DACTXFIFO_FIFOSIZE - 2))
{
DACTXFIFO_DECOMPRESS_HALT = 0;
}
return output;
}
}
//-----------------------------------------------------------------------------
// CLEAR_FIFOS()
//-----------------------------------------------------------------------------
//
// Routine resets all buffers; index values and flags to initial values.
//
void CLEAR_FIFOS(void)
{
// reset the DACTX FIFO
DACTXFIFO_EMPTY = 1;
DACTXFIFO_FIRST = 0;
DACTXFIFO_LAST = 0;
DACTXFIFO_COUNT = 0;
DACTXFIFO_OF = 0;
DACTXFIFO_FULL = 0;
// reset the UART RX FIFO
ReceiveFIFO_EMPTY = 1;
ReceiveFIFO_FIRST = 0;
ReceiveFIFO_LAST = 0;
ReceiveFIFO_COUNT = 0;
ReceiveFIFO_OF = 0;
ReceiveFIFO_FULL = 0;
}
//-----------------------------------------------------------------------------
// FIFO_ManagementRoutine()
//-----------------------------------------------------------------------------
//
//
//
void FIFO_ManagementRoutine(void)
{
bit EAState;
EAState = EA;
EA = 0;
while ((!ReceiveFIFO_EMPTY) && (!DACTXFIFO_DECOMPRESS_HALT)) // (!ReceiveFIFO_EMPTY)
{
// Decompress received samples when
DPCM_Decompress(); // available
}
EA = EAState;
EAState = EA;
EA = 0;
if(ReceiveFIFO_FULL)
{
ReceiveFIFO_Pull();
}
EA = EAState;
EAState = EA;
EA = 0;
if(DACTXFIFO_OF)
{
DACTXFIFO_Pull();
}
EA = EAState;
}
//-----------------------------------------------------------------------------
// DPCM_Decode
//-----------------------------------------------------------------------------
//
// decode the 8-bit (MSBs of 10-bit sample) sample using DPCM compression.
// INPUTS:
// old_prediction - the 8-bit unsigned predicted value from the current
// cycle which will be used to calculate the new predicted
// value
// dpcm_code - the 4-bit code indicating the quantized difference between
// the old_prediction and the current sample values
// (see DPCM_Encode for the dpcm_code values)
// OUTPUTS:
// new_prediction - the 8-bit unsigned predicted value for the next cycle
//
void DPCM_Decompress (void)
{
unsigned char CompressedByte, CompressedSample;
// static signed short UncompressedWord;
bit EAstate;
EAstate = EA;
EA = 0;
CompressedByte = ReceiveFIFO_Pull();
EA = EAstate;
CompressedSample = CompressedByte>>4;
UncompressedWord = UncompressedWord + Q_VALUES[CompressedSample];
if (UncompressedWord > 3)
{
UncompressedWord--;
}
else
if (UncompressedWord < 3)
{
UncompressedWord++;
}
if (UncompressedWord > 511)
{
UncompressedWord = 511;
}
else
if (UncompressedWord < -512)
{
UncompressedWord = -512;
}
EAstate = EA;
EA = 0;
DACTXFIFO_Push(UncompressedWord + 512);
EA = EAstate;
CompressedSample = CompressedByte & 0x0F;
UncompressedWord = UncompressedWord + Q_VALUES[CompressedSample];
if (UncompressedWord > 3)
{
UncompressedWord--;
}
else
if (UncompressedWord < 3)
{
UncompressedWord++;
}
if (UncompressedWord > 511)
{
UncompressedWord = 511;
}
else
if (UncompressedWord < -512)
{
UncompressedWord = -512;
}
EAstate = EA;
EA = 0;
DACTXFIFO_Push(UncompressedWord + 512);
EA = EAstate;
}
void WaitMS (unsigned int count)
{
TCON &= ~0x30; // Stop Timer0; clear TF0
TMOD &= ~0x0F; // Timer0 in 16-bit mode
TMOD |= 0x01;
CKCON |= 0x04; // Timer0 counts SYSCLKs
TH0 = (-SYSCLK / 1000) >> 8; // overflow in 1ms
TL0 = (-SYSCLK / 1000);
TR0 = 1; // Start Timer0
do {
while (!TF0); // wait for overflow
TR0 = 0; // Stop Timer0
TF0 = 0; // clear overflow flag
TH0 = (-SYSCLK / 1000) >> 8; // overflow in 1ms
TL0 = (-SYSCLK / 1000);
TR0 = 1; // Start Timer0
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