mmc_io.c

MMC 0.4.0驱动 龙珠 MOTO板子

		rs=(u16)temp;
		pRS->status|=((u32)rs&0x00FF)<<24;

#ifdef CONFIG_ARCH_MX2ADS
		if(port == 1)
			temp=(u32)mmcsdr_res_fifo_2;
		else
			temp=(u32)mmcsdr_res_fifo;
#endif
#ifdef CONFIG_ARCH_MX1ADS
		temp=(u32)mmcsdr_res_fifo;
#endif
		rs=(u16)temp;
		pRS->status|=((u32)rs)<<8;

#ifdef CONFIG_ARCH_MX2ADS
		if(port == 1)
			temp=(u32)mmcsdr_res_fifo_2;
		else
			temp=(u32)mmcsdr_res_fifo;
#endif
#ifdef CONFIG_ARCH_MX1ADS
		temp=(u32)mmcsdr_res_fifo;
#endif
		rs=(u16)temp;
		pRS->status|=(rs&0xFF00)>>8;

	}
	else if(rsType==MMCSDB_R3)
	{
		pRS->OCR=0;

#ifdef CONFIG_ARCH_MX2ADS
		if(port == 1)
			temp=(u32)mmcsdr_res_fifo_2;
		else
			temp=(u32)mmcsdr_res_fifo;
#endif
#ifdef CONFIG_ARCH_MX1ADS
		temp=(u32)mmcsdr_res_fifo;
#endif
		rs=(u16)temp;
		temp=rs&0x00FF;
		pRS->OCR|=temp<<24;

#ifdef CONFIG_ARCH_MX2ADS
		if(port == 1)
			temp=(u32)mmcsdr_res_fifo_2;
		else
			temp=(u32)mmcsdr_res_fifo;
#endif
#ifdef CONFIG_ARCH_MX1ADS
		temp=(u32)mmcsdr_res_fifo;
#endif
		rs=(u16)temp;
		pRS->OCR|=((u32)rs)<<8;

#ifdef CONFIG_ARCH_MX2ADS
		if(port == 1)
			temp=(u32)mmcsdr_res_fifo_2;
		else
			temp=(u32)mmcsdr_res_fifo;
#endif
#ifdef CONFIG_ARCH_MX1ADS
		temp=(u32)mmcsdr_res_fifo;
#endif
		rs=(u16)temp;
		pRS->OCR|=(rs&0xFF00)>>8;
	}
	else 
	{	
		for(i=0;i<16;)	
		{	
#ifdef CONFIG_ARCH_MX2ADS
			if(port == 1)
				temp=(u32)mmcsdr_res_fifo_2;
			else
				temp=(u32)mmcsdr_res_fifo;
#endif
#ifdef CONFIG_ARCH_MX1ADS
			temp=(u32)mmcsdr_res_fifo;
#endif
			
			rs=(u16)temp;

			pRS->CSD[i] = (rs&0xFF00)>>8;
			i++;
			pRS->CSD[i] = (rs&0x00FF);
			i++;
		}
	}
	
}

/******************************************************************************
 * Function Name: _MMCSD_SetBlockLenReg 
 *
 * Input:       
 * 	 size:		size of the block.
 * 	
 * Value Returned: 
 * 	
 *
 * Description: 
 * 	this routine sets the size of a block 
 *     
 *Modification History:
 ******************************************************************************/
void _MMCSD_SetBlockLenReg(u16 size,u32 port)
{
#ifdef CONFIG_ARCH_MX2ADS
	if(port == 1)
		mmcsdr_blk_len_2=size;
	else
		mmcsdr_blk_len=size;
#endif
#ifdef CONFIG_ARCH_MX1ADS
	mmcsdr_blk_len=size;
#endif
}

/******************************************************************************
 * Function Name: _MMCSD_SetNumberOfBlockReg 
 *
 * Input:       
 * 	
 * 	num:	Number of block	
 * 	
 * Value Returned: 
 * 	
 *
 * Description: 
 * 	this routine sets number of the blocks. 
 *     
 *Modification History:
 ******************************************************************************/

void _MMCSD_SetNumberOfBlockReg(u16 num,u32 port)
{
#ifdef CONFIG_ARCH_MX2ADS
	if(port == 1)
		mmcsdr_nob_2=num;
	else
		mmcsdr_nob=num;
#endif
#ifdef CONFIG_ARCH_MX1ADS
	mmcsdr_nob=num;
#endif
}

/******************************************************************************
 * Function Name: _MMCSD_ClockSet 
 *
 * Input:       
 * 	
 * 	speed:		if speed == oxff, set the highest speed.
 * 	
 * Value Returned: 
 * 	
 *
 * Description: 
 * 	this routine set clock rate.    
 *     
 *Modification History:
 ******************************************************************************/

void _MMCSD_ClockSet(u32 prescaler,u8 clk,int port)
{
	_MMCSD_StopClk(port);

#ifdef CONFIG_ARCH_MX1ADS
	prescaler = prescaler&0x07;
	clk = clk&0x07;
	mmcsdr_clk_rate=(prescaler<<3)|clk;
#endif
#ifdef CONFIG_ARCH_MX2ADS
	prescaler = prescaler&0x0f;
	clk = clk&0xfff;
	if(port == 1)
		mmcsdr_clk_rate_2=(prescaler<<4)|clk;
	else
		mmcsdr_clk_rate=(prescaler<<4)|clk;

#endif	
}

void _MMCSD_SetClk(int mode,int port)
{
#ifdef CONFIG_ARCH_MX1ADS
        if(mode == MMCSD_HIGH_SPEED)
	{
		if(cur_perclk2<20)
		{
			_MMCSD_ClockSet(0,0,0);
		}
		else
		{
			_MMCSD_ClockSet(cur_perclk2/20-1,1,0);
		}
	}
	else
	{
		_MMCSD_ClockSet(7,7,0);
	}
#endif
#ifdef CONFIG_ARCH_MX2ADS
	if(mode == MMCSD_HIGH_SPEED)
	{
		if(cur_perclk2<20)
		{
			_MMCSD_ClockSet(0,1,port);
		}
		else
		{
			_MMCSD_ClockSet(0,cur_perclk2/20+1,port);
		}
	}
	else
	{
		_MMCSD_ClockSet(0x8,0xc,port);//if perclk2 is about 20M
	}
//        printk("clkrate=0x%x ,perclk2=0x%x \n",mmcsdr_clk_rate,cur_perclk2);
#endif
}
/******************************************************************************
 * Function Name: _MMCSD_PinConfig 
 *
 * Input:       
 * 	
 * Value Returned: 
 *
 * Description: 
 * 	this routine get current perclk2 value.    
 *     
 *Modification History:
 ******************************************************************************/

static void _MMCSD_get_cur_perclk2(void)
{
	u32 bclkdiv,pclkdiv;
#ifdef CONFIG_ARCH_MX1ADS
	cur_perclk2 = *(u32 *)CRM_PCDR;
	cur_perclk2 = (cur_perclk2&0x000000F0)>>4;
	cur_perclk2 = 96/(cur_perclk2+1);

#endif
#ifdef CONFIG_ARCH_MX2ADS
	bclkdiv = _reg_CRM_CSCR;
	bclkdiv = (bclkdiv&0x00003c00)>>10;
	pclkdiv = _reg_CRM_PCDR1;
	pclkdiv = (pclkdiv&0x00003f00)>>8;

	cur_perclk2 = 266/(bclkdiv+1);
	cur_perclk2 = cur_perclk2/(pclkdiv+1);
	
#endif 
}
void _MMCSD_PinConfig(void)
{
	_MMCSD_get_cur_perclk2();
#ifdef CONFIG_ARCH_MX1ADS
	*(u32 *)DBMX1_GIUS_B &= 0xFFFFC0FF;
	*(u32 *)DBMX1_GPR_B &= 0xFFFFC0FF;
	*(u32 *)DBMX1_PUEN_B |= 0x00003f00;
#endif

#ifdef CONFIG_ARCH_MX2ADS
	_reg_GPIO_DDIR(GPIOE) |= 0x00fc0000;//0x3f000000;
	_reg_GPIO_GIUS(GPIOE) &= 0xff03ffff;
	_reg_GPIO_GPR(GPIOE)  &= 0xff03ffff;
	_reg_GPIO_PUEN(GPIOE) |= 0x00fc0000;

	//add for SD2 pb4~pb9 pb7-dat3,pb9-clk
	_reg_GPIO_DDIR(GPIOB) |= 0x000003f0; 
	_reg_GPIO_GIUS(GPIOB) &= ~0x000003f0;
	_reg_GPIO_GPR(GPIOB)  &= ~0x000003f0;
	_reg_GPIO_PUEN(GPIOB) |= 0x000003f0;

#endif	
}
void _MMCSD_64M_MMC_PinConfig(void)
{
	_MMCSD_get_cur_perclk2();
#ifdef CONFIG_ARCH_MX2ADS
	//pin pe18~23,18,19,20,22 up, 21-dat3,23-clk
	_reg_GPIO_DDIR(GPIOE) |= 0x00fc0000; 
	_reg_GPIO_GIUS(GPIOE) &= 0xff03ffff;
	_reg_GPIO_GPR(GPIOE)  &= 0xff03ffff;
	_reg_GPIO_PUEN(GPIOE) |= 0x005c0000;
//	_reg_GPIO_PUEN(GPIOE) &= 0xff5fffff;
	
	//add for SD2 pb4~pb9 pb7-dat3,pb9-clk
	_reg_GPIO_DDIR(GPIOB) |= 0x000003f0; 
	_reg_GPIO_GIUS(GPIOB) &= ~0x000003f0;
	_reg_GPIO_GPR(GPIOB)  &= ~0x000003f0;
	_reg_GPIO_PUEN(GPIOB) |= 0x00000170;
	_reg_GPIO_PUEN(GPIOB) &= 0xfffffd7f;
	
	
#endif	
	//pb8~13, 11-dat3,12-clk,13-cmd
#ifdef CONFIG_ARCH_MX1ADS
	*(u32 *)DBMX1_DDIR_B |= 0x00003F00;		// Enable SDHC's port to Output
	*(u32 *)DBMX1_GIUS_B &= 0xFFFFC0FF;
	*(u32 *)DBMX1_GPR_B  &= 0xFFFFC0FF;
	*(u32 *)DBMX1_PUEN_B |= 0x00003700;
	
	*(u32 *)DBMX1_PUEN_B  &=0xfffff7ff;
	
	
	
#endif
}
/************************************************

put content to STR_STP_CLK
 U32 Clk_en = set the clk to start or stop
	0x6: start MMC clk
	0x5: stop MMC clk

************************************************/
void Start_Stop_Clk(u32 Clk_en,int port)
{
    	//when the clk is STARTED check whether the MMC is enable and reset is not set 
	if(((Clk_en&0x2)!=0)&&((Clk_en&0x8)==0)&&((Clk_en&0x4)!=0))
	{
#ifdef CONFIG_ARCH_MX2ADS
    		if(port == 1)
	    	{
	    		mmcsdr_str_stp_clk_2 &= ~MMCSD_CLOCK_MASK;
			mmcsdr_str_stp_clk_2 |= Clk_en;
			while ( ((mmcsdr_status_2)&0x100) == 0 );//check the status if the clock do not start
    		}
	    	else
		{
			mmcsdr_str_stp_clk &= ~MMCSD_CLOCK_MASK;
			mmcsdr_str_stp_clk |= Clk_en;
			while ( ((mmcsdr_status)&0x100) == 0 );//check the status if the clock do not start
		}
#endif
#ifdef 	CONFIG_ARCH_MX1ADS
		mmcsdr_str_stp_clk &= ~MMCSD_CLOCK_MASK;
		mmcsdr_str_stp_clk |= Clk_en;
		while ( ((mmcsdr_status)&0x100) == 0 );//check the status if the clock do not start
#endif
	//when the clk is STOPPED, check whether the MMC is enable and reset is not set
	}
	else if(((Clk_en&0x1)!=0)&&((Clk_en&0x8)==0)&&((Clk_en&0x4)!=0))
	{
#ifdef CONFIG_ARCH_MX2ADS
    		if(port == 1)
		{
			mmcsdr_str_stp_clk_2 &= ~MMCSD_CLOCK_MASK;
			mmcsdr_str_stp_clk_2 |= Clk_en;
			while ( ((mmcsdr_status_2) & 0x100) != 0 );//check the status if the clock is still running
		}
		else
		{
			mmcsdr_str_stp_clk &= ~MMCSD_CLOCK_MASK;
			mmcsdr_str_stp_clk |= Clk_en;
			while ( ((mmcsdr_status) & 0x100) != 0 );//check the status if the clock is still running
		}
#endif
#ifdef 	CONFIG_ARCH_MX1ADS
		mmcsdr_str_stp_clk &= ~MMCSD_CLOCK_MASK;
		mmcsdr_str_stp_clk |= Clk_en;
		while ( ((mmcsdr_status) & 0x100) != 0 );//check the status if the clock is still running
#endif
	}
	//reset or enable the syste
	else 
	{
#ifdef CONFIG_ARCH_MX2ADS
		if(port == 1)
		{
			mmcsdr_str_stp_clk_2 &= ~MMCSD_CLOCK_MASK;
			mmcsdr_str_stp_clk_2 |= Clk_en;
		}
		else
		{
			mmcsdr_str_stp_clk &= ~MMCSD_CLOCK_MASK;
			mmcsdr_str_stp_clk |= Clk_en;
		}
#endif
#ifdef 	CONFIG_ARCH_MX1ADS
		mmcsdr_str_stp_clk &= ~MMCSD_CLOCK_MASK;
		mmcsdr_str_stp_clk |= Clk_en;
#endif
		
	}
}